diff options
author | Thomas Abraham <thomas.ab@samsung.com> | 2010-05-12 20:27:13 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2010-05-12 21:42:46 -0400 |
commit | 47051461ab1cc8049e676902bf1972268bed4b9a (patch) | |
tree | 65d70cc7b90ed0c28e6726b713836a3aa859a7fa /arch/arm/mach-s5p6440 | |
parent | e4f44f82691e927a2f5eb582793454e052b920c7 (diff) |
ARM: S5P6440: Remove usage of clk_p and add clk_pclk clock
The clk_p clock is of type 'struct clk' whereas on S5P6440,
the pclk is more suitable to be of type 'struct clksrc_clk'
(since pclk clock is divided version of hclk).
This patch modifies the following.
1. Adds the 'clk_pclk' clock which is of type 'struct clksrc_clk'.
2. Adds clk_pclk into the list of sysclks.
3. The clock rate 'pclk' is modified to be derived from clk_pclk.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s5p6440')
-rw-r--r-- | arch/arm/mach-s5p6440/clock.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/mach-s5p6440/clock.c b/arch/arm/mach-s5p6440/clock.c index bc0458e6d420..61bc85b098ff 100644 --- a/arch/arm/mach-s5p6440/clock.c +++ b/arch/arm/mach-s5p6440/clock.c | |||
@@ -275,6 +275,15 @@ static struct clksrc_clk clk_hclk = { | |||
275 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 4 }, | 275 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 4 }, |
276 | }; | 276 | }; |
277 | 277 | ||
278 | static struct clksrc_clk clk_pclk = { | ||
279 | .clk = { | ||
280 | .name = "clk_pclk", | ||
281 | .id = -1, | ||
282 | .parent = &clk_hclk.clk, | ||
283 | }, | ||
284 | .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 4 }, | ||
285 | }; | ||
286 | |||
278 | int s5p6440_clk48m_ctrl(struct clk *clk, int enable) | 287 | int s5p6440_clk48m_ctrl(struct clk *clk, int enable) |
279 | { | 288 | { |
280 | unsigned long flags; | 289 | unsigned long flags; |
@@ -590,6 +599,7 @@ static struct clksrc_clk *sysclks[] = { | |||
590 | &clk_dout_mpll, | 599 | &clk_dout_mpll, |
591 | &clk_armclk, | 600 | &clk_armclk, |
592 | &clk_hclk, | 601 | &clk_hclk, |
602 | &clk_pclk, | ||
593 | }; | 603 | }; |
594 | 604 | ||
595 | void __init_or_cpufreq s5p6440_setup_clocks(void) | 605 | void __init_or_cpufreq s5p6440_setup_clocks(void) |
@@ -639,7 +649,7 @@ void __init_or_cpufreq s5p6440_setup_clocks(void) | |||
639 | 649 | ||
640 | fclk = clk_get_rate(&clk_armclk.clk); | 650 | fclk = clk_get_rate(&clk_armclk.clk); |
641 | hclk = clk_get_rate(&clk_hclk.clk); | 651 | hclk = clk_get_rate(&clk_hclk.clk); |
642 | pclk = hclk / GET_DIV(clkdiv0, S5P_CLKDIV0_PCLK); | 652 | pclk = clk_get_rate(&clk_pclk.clk); |
643 | 653 | ||
644 | if (__raw_readl(S5P_OTHERS) & S5P_OTHERS_HCLK_LOW_SEL_MPLL) { | 654 | if (__raw_readl(S5P_OTHERS) & S5P_OTHERS_HCLK_LOW_SEL_MPLL) { |
645 | /* Asynchronous mode */ | 655 | /* Asynchronous mode */ |