diff options
| author | Kukjin Kim <kgene.kim@samsung.com> | 2010-07-20 20:19:51 -0400 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-08-05 05:30:21 -0400 |
| commit | c8def0857f93413db795ce3586bcc3c3eaae7088 (patch) | |
| tree | c1fce262d95ea73924f97379e035f080de680493 /arch/arm/mach-s5p6440/mach-smdk6440.c | |
| parent | 02a0456b3b6ad7503a37fab6f00a27d2bd53d483 (diff) | |
ARM: S5P: Changes the definition name of default UART registers
This patch changes the definition name of default UCON, ULCON, and
UFCON UART registers from ARCH(SoC) to Machine(Board). Because it
depends on machine.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5p6440/mach-smdk6440.c')
| -rw-r--r-- | arch/arm/mach-s5p6440/mach-smdk6440.c | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p6440/mach-smdk6440.c index 8291fecc701a..fedc1423f1f9 100644 --- a/arch/arm/mach-s5p6440/mach-smdk6440.c +++ b/arch/arm/mach-s5p6440/mach-smdk6440.c | |||
| @@ -41,16 +41,16 @@ | |||
| 41 | #include <plat/adc.h> | 41 | #include <plat/adc.h> |
| 42 | #include <plat/ts.h> | 42 | #include <plat/ts.h> |
| 43 | 43 | ||
| 44 | #define S5P6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | 44 | #define SMDK6440_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ |
| 45 | S3C2410_UCON_RXILEVEL | \ | 45 | S3C2410_UCON_RXILEVEL | \ |
| 46 | S3C2410_UCON_TXIRQMODE | \ | 46 | S3C2410_UCON_TXIRQMODE | \ |
| 47 | S3C2410_UCON_RXIRQMODE | \ | 47 | S3C2410_UCON_RXIRQMODE | \ |
| 48 | S3C2410_UCON_RXFIFO_TOI | \ | 48 | S3C2410_UCON_RXFIFO_TOI | \ |
| 49 | S3C2443_UCON_RXERR_IRQEN) | 49 | S3C2443_UCON_RXERR_IRQEN) |
| 50 | 50 | ||
| 51 | #define S5P6440_ULCON_DEFAULT S3C2410_LCON_CS8 | 51 | #define SMDK6440_ULCON_DEFAULT S3C2410_LCON_CS8 |
| 52 | 52 | ||
| 53 | #define S5P6440_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | 53 | #define SMDK6440_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
| 54 | S3C2440_UFCON_TXTRIG16 | \ | 54 | S3C2440_UFCON_TXTRIG16 | \ |
| 55 | S3C2410_UFCON_RXTRIG8) | 55 | S3C2410_UFCON_RXTRIG8) |
| 56 | 56 | ||
| @@ -58,30 +58,30 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = { | |||
| 58 | [0] = { | 58 | [0] = { |
| 59 | .hwport = 0, | 59 | .hwport = 0, |
| 60 | .flags = 0, | 60 | .flags = 0, |
| 61 | .ucon = S5P6440_UCON_DEFAULT, | 61 | .ucon = SMDK6440_UCON_DEFAULT, |
| 62 | .ulcon = S5P6440_ULCON_DEFAULT, | 62 | .ulcon = SMDK6440_ULCON_DEFAULT, |
| 63 | .ufcon = S5P6440_UFCON_DEFAULT, | 63 | .ufcon = SMDK6440_UFCON_DEFAULT, |
| 64 | }, | 64 | }, |
| 65 | [1] = { | 65 | [1] = { |
| 66 | .hwport = 1, | 66 | .hwport = 1, |
| 67 | .flags = 0, | 67 | .flags = 0, |
| 68 | .ucon = S5P6440_UCON_DEFAULT, | 68 | .ucon = SMDK6440_UCON_DEFAULT, |
| 69 | .ulcon = S5P6440_ULCON_DEFAULT, | 69 | .ulcon = SMDK6440_ULCON_DEFAULT, |
| 70 | .ufcon = S5P6440_UFCON_DEFAULT, | 70 | .ufcon = SMDK6440_UFCON_DEFAULT, |
| 71 | }, | 71 | }, |
| 72 | [2] = { | 72 | [2] = { |
| 73 | .hwport = 2, | 73 | .hwport = 2, |
| 74 | .flags = 0, | 74 | .flags = 0, |
| 75 | .ucon = S5P6440_UCON_DEFAULT, | 75 | .ucon = SMDK6440_UCON_DEFAULT, |
| 76 | .ulcon = S5P6440_ULCON_DEFAULT, | 76 | .ulcon = SMDK6440_ULCON_DEFAULT, |
| 77 | .ufcon = S5P6440_UFCON_DEFAULT, | 77 | .ufcon = SMDK6440_UFCON_DEFAULT, |
| 78 | }, | 78 | }, |
| 79 | [3] = { | 79 | [3] = { |
| 80 | .hwport = 3, | 80 | .hwport = 3, |
| 81 | .flags = 0, | 81 | .flags = 0, |
| 82 | .ucon = S5P6440_UCON_DEFAULT, | 82 | .ucon = SMDK6440_UCON_DEFAULT, |
| 83 | .ulcon = S5P6440_ULCON_DEFAULT, | 83 | .ulcon = SMDK6440_ULCON_DEFAULT, |
| 84 | .ufcon = S5P6440_UFCON_DEFAULT, | 84 | .ufcon = SMDK6440_UFCON_DEFAULT, |
| 85 | }, | 85 | }, |
| 86 | }; | 86 | }; |
| 87 | 87 | ||