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authorKukjin Kim <kgene.kim@samsung.com>2010-01-19 01:31:17 -0500
committerBen Dooks <ben-linux@fluff.org>2010-01-19 04:37:18 -0500
commit42d828d46f526605c84ebdb5a987fd25fe09a3c9 (patch)
tree952aae124ca97a26fb9b2a356860bb0c039cd1d7 /arch/arm/mach-s5p6440/include/mach
parent1f323cfda5feee4e9c1fc09ededaee849f906468 (diff)
ARM: S5P6440: Add S5P6440 GPIO support
This patch adds Samsung's S5P6440 GPIO support. Signed-off-by: Adityapratap Sharma <aditya.ps@samsung.com> Signed-off-by: Atul Dahiya <atul.dahiya@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s5p6440/include/mach')
-rw-r--r--arch/arm/mach-s5p6440/include/mach/regs-gpio.h54
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-gpio.h b/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
new file mode 100644
index 000000000000..82ff753913da
--- /dev/null
+++ b/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
@@ -0,0 +1,54 @@
1/* linux/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P6440 - GPIO register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_REGS_GPIO_H
14#define __ASM_ARCH_REGS_GPIO_H __FILE__
15
16#include <mach/map.h>
17
18/* Base addresses for each of the banks */
19#define S5P6440_GPA_BASE (S5P_VA_GPIO + 0x0000)
20#define S5P6440_GPB_BASE (S5P_VA_GPIO + 0x0020)
21#define S5P6440_GPC_BASE (S5P_VA_GPIO + 0x0040)
22#define S5P6440_GPF_BASE (S5P_VA_GPIO + 0x00A0)
23#define S5P6440_GPG_BASE (S5P_VA_GPIO + 0x00C0)
24#define S5P6440_GPH_BASE (S5P_VA_GPIO + 0x00E0)
25#define S5P6440_GPI_BASE (S5P_VA_GPIO + 0x0100)
26#define S5P6440_GPJ_BASE (S5P_VA_GPIO + 0x0120)
27#define S5P6440_GPN_BASE (S5P_VA_GPIO + 0x0830)
28#define S5P6440_GPP_BASE (S5P_VA_GPIO + 0x0160)
29#define S5P6440_GPR_BASE (S5P_VA_GPIO + 0x0290)
30#define S5P6440_EINT0CON0 (S5P_VA_GPIO + 0x900)
31#define S5P6440_EINT0FLTCON0 (S5P_VA_GPIO + 0x910)
32#define S5P6440_EINT0FLTCON1 (S5P_VA_GPIO + 0x914)
33#define S5P6440_EINT0MASK (S5P_VA_GPIO + 0x920)
34#define S5P6440_EINT0PEND (S5P_VA_GPIO + 0x924)
35
36/* for LCD */
37#define S5P6440_SPCON_LCD_SEL_RGB (1 << 0)
38#define S5P6440_SPCON_LCD_SEL_MASK (3 << 0)
39
40/* These set of macros are not really useful for the
41 * GPF/GPI/GPJ/GPN/GPP,
42 * useful for others set of GPIO's (4 bit)
43 */
44#define S5P6440_GPIO_CONMASK(__gpio) (0xf << ((__gpio) * 4))
45#define S5P6440_GPIO_INPUT(__gpio) (0x0 << ((__gpio) * 4))
46#define S5P6440_GPIO_OUTPUT(__gpio) (0x1 << ((__gpio) * 4))
47
48/* Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit)
49 * */
50#define S5P6440_GPIO2_CONMASK(__gpio) (0x3 << ((__gpio) * 2))
51#define S5P6440_GPIO2_INPUT(__gpio) (0x0 << ((__gpio) * 2))
52#define S5P6440_GPIO2_OUTPUT(__gpio) (0x1 << ((__gpio) * 2))
53
54#endif /* __ASM_ARCH_REGS_GPIO_H */