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authorTakashi Iwai <tiwai@suse.de>2010-12-13 03:28:43 -0500
committerTakashi Iwai <tiwai@suse.de>2010-12-13 03:28:43 -0500
commit20aeeb356ba2e8daa99b5942c528ae2b3ea28433 (patch)
treed2cebc7039954851998d592123899f5627def7a9 /arch/arm/mach-s3c64xx
parent07a9e2b2fbdda631eeff54e4b8ebcaaea71be538 (diff)
parent5b84ba26a9672e615897234fa5efd3eea2d6b295 (diff)
Merge branch 'topic/workq-update' into topic/asoc
Conflicts: sound/soc/codecs/wm8350.c sound/soc/codecs/wm8753.c sound/soc/sh/fsi.c sound/soc/soc-core.c
Diffstat (limited to 'arch/arm/mach-s3c64xx')
-rw-r--r--arch/arm/mach-s3c64xx/mach-mini6410.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-real6410.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 249c62956471..89f35e02e883 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -45,7 +45,7 @@
45 45
46#include <video/platform_lcd.h> 46#include <video/platform_lcd.h>
47 47
48#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) 48#define UCON S3C2410_UCON_DEFAULT
49#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) 49#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
50#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 50#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
51 51
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index f9ef9b5c5f5a..4957ab0a0d4a 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -46,7 +46,7 @@
46 46
47#include <video/platform_lcd.h> 47#include <video/platform_lcd.h>
48 48
49#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) 49#define UCON S3C2410_UCON_DEFAULT
50#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) 50#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
51#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 51#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
52 52