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authorBen Dooks <ben-linux@fluff.org>2010-01-25 21:19:18 -0500
committerBen Dooks <ben-linux@fluff.org>2010-02-20 17:32:01 -0500
commit88fc68a280709f3fb9488986ab39eac330d17b6d (patch)
treeb9f9a91f3bd6e735cf611f3cec7438f86fd3e4f7 /arch/arm/mach-s3c64xx
parented618aff8a952f712caf1d475e0947a32a8b6606 (diff)
ARM: S3C64XX: Move device and device setup into mach-s3c64xx
Move the S3C64XX specific device and setup files into mach-s3c64xx as they are unlikely to be used outside of this code. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c64xx')
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig26
-rw-r--r--arch/arm/mach-s3c64xx/Makefile13
-rw-r--r--arch/arm/mach-s3c64xx/dev-adc.c46
-rw-r--r--arch/arm/mach-s3c64xx/dev-audio.c257
-rw-r--r--arch/arm/mach-s3c64xx/dev-rtc.c43
-rw-r--r--arch/arm/mach-s3c64xx/dev-spi.c182
-rw-r--r--arch/arm/mach-s3c64xx/dev-uart.c147
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/spi-clocks.h18
-rw-r--r--arch/arm/mach-s3c64xx/setup-fb-24bpp.c37
-rw-r--r--arch/arm/mach-s3c64xx/setup-i2c0.c31
-rw-r--r--arch/arm/mach-s3c64xx/setup-i2c1.c31
-rw-r--r--arch/arm/mach-s3c64xx/setup-sdhci-gpio.c75
12 files changed, 905 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index ce32e4997d76..15e065ef19a5 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -26,6 +26,32 @@ config S3C64XX_SETUP_SDHCI
26 Internal configuration for default SDHCI setup for S3C6400 and 26 Internal configuration for default SDHCI setup for S3C6400 and
27 S3C6410 SoCs. 27 S3C6410 SoCs.
28 28
29# platform specific device setup
30
31config S3C64XX_SETUP_I2C0
32 bool
33 default y
34 help
35 Common setup code for i2c bus 0.
36
37 Note, currently since i2c0 is always compiled, this setup helper
38 is always compiled with it.
39
40config S3C64XX_SETUP_I2C1
41 bool
42 help
43 Common setup code for i2c bus 1.
44
45config S3C64XX_SETUP_FB_24BPP
46 bool
47 help
48 Common setup code for S3C64XX with an 24bpp RGB display helper.
49
50config S3C64XX_SETUP_SDHCI_GPIO
51 bool
52 help
53 Common setup code for S3C64XX SDHCI GPIO configurations
54
29# S36400 Macchine support 55# S36400 Macchine support
30 56
31config MACH_SMDK6400 57config MACH_SMDK6400
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile
index 103bed48b46e..49b71d5f2e59 100644
--- a/arch/arm/mach-s3c64xx/Makefile
+++ b/arch/arm/mach-s3c64xx/Makefile
@@ -18,9 +18,13 @@ obj-$(CONFIG_CPU_S3C6410) += s3c6410.o
18obj-y += irq.o 18obj-y += irq.o
19obj-y += irq-eint.o 19obj-y += irq-eint.o
20 20
21# setup support 21# Device setup
22 22
23obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o
24obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o
23obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o 25obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o
26obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o
27obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
24 28
25# PM 29# PM
26 30
@@ -33,3 +37,10 @@ obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o
33obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o 37obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o
34obj-$(CONFIG_MACH_NCP) += mach-ncp.o 38obj-$(CONFIG_MACH_NCP) += mach-ncp.o
35obj-$(CONFIG_MACH_HMT) += mach-hmt.o 39obj-$(CONFIG_MACH_HMT) += mach-hmt.o
40
41# device support
42
43obj-y += dev-uart.o
44obj-y += dev-rtc.o
45obj-$(CONFIG_S3C_ADC) += dev-adc.o
46obj-$(CONFIG_SND_S3C24XX_SOC) += dev-audio.o
diff --git a/arch/arm/mach-s3c64xx/dev-adc.c b/arch/arm/mach-s3c64xx/dev-adc.c
new file mode 100644
index 000000000000..fafef9b6bcfa
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-adc.c
@@ -0,0 +1,46 @@
1/* linux/arch/arm/plat-s3c64xx/dev-adc.c
2 *
3 * Copyright 2010 Maurus Cuelenaere
4 *
5 * S3C64xx series device definition for ADC device
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/string.h>
14#include <linux/platform_device.h>
15
16#include <mach/irqs.h>
17#include <mach/map.h>
18
19#include <plat/adc.h>
20#include <plat/devs.h>
21#include <plat/cpu.h>
22
23static struct resource s3c_adc_resource[] = {
24 [0] = {
25 .start = S3C64XX_PA_ADC,
26 .end = S3C64XX_PA_ADC + SZ_256 - 1,
27 .flags = IORESOURCE_MEM,
28 },
29 [1] = {
30 .start = IRQ_TC,
31 .end = IRQ_TC,
32 .flags = IORESOURCE_IRQ,
33 },
34 [2] = {
35 .start = IRQ_ADC,
36 .end = IRQ_ADC,
37 .flags = IORESOURCE_IRQ,
38 },
39};
40
41struct platform_device s3c_device_adc = {
42 .name = "s3c64xx-adc",
43 .id = -1,
44 .num_resources = ARRAY_SIZE(s3c_adc_resource),
45 .resource = s3c_adc_resource,
46};
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c
new file mode 100644
index 000000000000..aaffb8066707
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-audio.c
@@ -0,0 +1,257 @@
1/* linux/arch/arm/plat-s3c/dev-audio.c
2 *
3 * Copyright 2009 Wolfson Microelectronics
4 * Mark Brown <broonie@opensource.wolfsonmicro.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/platform_device.h>
14
15#include <mach/irqs.h>
16#include <mach/map.h>
17#include <mach/dma.h>
18#include <mach/gpio.h>
19
20#include <plat/devs.h>
21#include <plat/audio.h>
22#include <plat/gpio-cfg.h>
23
24#include <mach/gpio-bank-c.h>
25#include <mach/gpio-bank-d.h>
26#include <mach/gpio-bank-e.h>
27#include <mach/gpio-bank-h.h>
28
29static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
30{
31 switch (pdev->id) {
32 case 0:
33 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK);
34 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK);
35 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK);
36 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI);
37 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0);
38 break;
39 case 1:
40 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK);
41 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK);
42 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK);
43 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI);
44 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0);
45 default:
46 printk(KERN_DEBUG "Invalid I2S Controller number!");
47 return -EINVAL;
48 }
49
50 return 0;
51}
52
53static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev)
54{
55 s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0);
56 s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1);
57 s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2);
58 s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK);
59 s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK);
60 s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK);
61 s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI);
62
63 return 0;
64}
65
66static struct resource s3c64xx_iis0_resource[] = {
67 [0] = {
68 .start = S3C64XX_PA_IIS0,
69 .end = S3C64XX_PA_IIS0 + 0x100 - 1,
70 .flags = IORESOURCE_MEM,
71 },
72 [1] = {
73 .start = DMACH_I2S0_OUT,
74 .end = DMACH_I2S0_OUT,
75 .flags = IORESOURCE_DMA,
76 },
77 [2] = {
78 .start = DMACH_I2S0_IN,
79 .end = DMACH_I2S0_IN,
80 .flags = IORESOURCE_DMA,
81 },
82};
83
84static struct s3c_audio_pdata s3c_i2s0_pdata = {
85 .cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
86};
87
88struct platform_device s3c64xx_device_iis0 = {
89 .name = "s3c64xx-iis",
90 .id = 0,
91 .num_resources = ARRAY_SIZE(s3c64xx_iis0_resource),
92 .resource = s3c64xx_iis0_resource,
93 .dev = {
94 .platform_data = &s3c_i2s0_pdata,
95 },
96};
97EXPORT_SYMBOL(s3c64xx_device_iis0);
98
99static struct resource s3c64xx_iis1_resource[] = {
100 [0] = {
101 .start = S3C64XX_PA_IIS1,
102 .end = S3C64XX_PA_IIS1 + 0x100 - 1,
103 .flags = IORESOURCE_MEM,
104 },
105 [1] = {
106 .start = DMACH_I2S1_OUT,
107 .end = DMACH_I2S1_OUT,
108 .flags = IORESOURCE_DMA,
109 },
110 [2] = {
111 .start = DMACH_I2S1_IN,
112 .end = DMACH_I2S1_IN,
113 .flags = IORESOURCE_DMA,
114 },
115};
116
117static struct s3c_audio_pdata s3c_i2s1_pdata = {
118 .cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
119};
120
121struct platform_device s3c64xx_device_iis1 = {
122 .name = "s3c64xx-iis",
123 .id = 1,
124 .num_resources = ARRAY_SIZE(s3c64xx_iis1_resource),
125 .resource = s3c64xx_iis1_resource,
126 .dev = {
127 .platform_data = &s3c_i2s1_pdata,
128 },
129};
130EXPORT_SYMBOL(s3c64xx_device_iis1);
131
132static struct resource s3c64xx_iisv4_resource[] = {
133 [0] = {
134 .start = S3C64XX_PA_IISV4,
135 .end = S3C64XX_PA_IISV4 + 0x100 - 1,
136 .flags = IORESOURCE_MEM,
137 },
138 [1] = {
139 .start = DMACH_HSI_I2SV40_TX,
140 .end = DMACH_HSI_I2SV40_TX,
141 .flags = IORESOURCE_DMA,
142 },
143 [2] = {
144 .start = DMACH_HSI_I2SV40_RX,
145 .end = DMACH_HSI_I2SV40_RX,
146 .flags = IORESOURCE_DMA,
147 },
148};
149
150static struct s3c_audio_pdata s3c_i2sv4_pdata = {
151 .cfg_gpio = s3c64xx_i2sv4_cfg_gpio,
152};
153
154struct platform_device s3c64xx_device_iisv4 = {
155 .name = "s3c64xx-iis-v4",
156 .id = -1,
157 .num_resources = ARRAY_SIZE(s3c64xx_iisv4_resource),
158 .resource = s3c64xx_iisv4_resource,
159 .dev = {
160 .platform_data = &s3c_i2sv4_pdata,
161 },
162};
163EXPORT_SYMBOL(s3c64xx_device_iisv4);
164
165
166/* PCM Controller platform_devices */
167
168static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
169{
170 switch (pdev->id) {
171 case 0:
172 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK);
173 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
174 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
175 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
176 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
177 break;
178 case 1:
179 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK);
180 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
181 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
182 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
183 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
184 break;
185 default:
186 printk(KERN_DEBUG "Invalid PCM Controller number!");
187 return -EINVAL;
188 }
189
190 return 0;
191}
192
193static struct resource s3c64xx_pcm0_resource[] = {
194 [0] = {
195 .start = S3C64XX_PA_PCM0,
196 .end = S3C64XX_PA_PCM0 + 0x100 - 1,
197 .flags = IORESOURCE_MEM,
198 },
199 [1] = {
200 .start = DMACH_PCM0_TX,
201 .end = DMACH_PCM0_TX,
202 .flags = IORESOURCE_DMA,
203 },
204 [2] = {
205 .start = DMACH_PCM0_RX,
206 .end = DMACH_PCM0_RX,
207 .flags = IORESOURCE_DMA,
208 },
209};
210
211static struct s3c_audio_pdata s3c_pcm0_pdata = {
212 .cfg_gpio = s3c64xx_pcm_cfg_gpio,
213};
214
215struct platform_device s3c64xx_device_pcm0 = {
216 .name = "samsung-pcm",
217 .id = 0,
218 .num_resources = ARRAY_SIZE(s3c64xx_pcm0_resource),
219 .resource = s3c64xx_pcm0_resource,
220 .dev = {
221 .platform_data = &s3c_pcm0_pdata,
222 },
223};
224EXPORT_SYMBOL(s3c64xx_device_pcm0);
225
226static struct resource s3c64xx_pcm1_resource[] = {
227 [0] = {
228 .start = S3C64XX_PA_PCM1,
229 .end = S3C64XX_PA_PCM1 + 0x100 - 1,
230 .flags = IORESOURCE_MEM,
231 },
232 [1] = {
233 .start = DMACH_PCM1_TX,
234 .end = DMACH_PCM1_TX,
235 .flags = IORESOURCE_DMA,
236 },
237 [2] = {
238 .start = DMACH_PCM1_RX,
239 .end = DMACH_PCM1_RX,
240 .flags = IORESOURCE_DMA,
241 },
242};
243
244static struct s3c_audio_pdata s3c_pcm1_pdata = {
245 .cfg_gpio = s3c64xx_pcm_cfg_gpio,
246};
247
248struct platform_device s3c64xx_device_pcm1 = {
249 .name = "samsung-pcm",
250 .id = 1,
251 .num_resources = ARRAY_SIZE(s3c64xx_pcm1_resource),
252 .resource = s3c64xx_pcm1_resource,
253 .dev = {
254 .platform_data = &s3c_pcm1_pdata,
255 },
256};
257EXPORT_SYMBOL(s3c64xx_device_pcm1);
diff --git a/arch/arm/mach-s3c64xx/dev-rtc.c b/arch/arm/mach-s3c64xx/dev-rtc.c
new file mode 100644
index 000000000000..b9e7a05f0129
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-rtc.c
@@ -0,0 +1,43 @@
1/* linux/arch/arm/plat-s3c64xx/dev-rtc.c
2 *
3 * Copyright 2009 by Maurus Cuelenaere <mcuelenaere@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/kernel.h>
11#include <linux/string.h>
12#include <linux/platform_device.h>
13
14#include <mach/irqs.h>
15#include <mach/map.h>
16
17#include <plat/devs.h>
18
19static struct resource s3c_rtc_resource[] = {
20 [0] = {
21 .start = S3C64XX_PA_RTC,
22 .end = S3C64XX_PA_RTC + 0xff,
23 .flags = IORESOURCE_MEM,
24 },
25 [1] = {
26 .start = IRQ_RTC_ALARM,
27 .end = IRQ_RTC_ALARM,
28 .flags = IORESOURCE_IRQ,
29 },
30 [2] = {
31 .start = IRQ_RTC_TIC,
32 .end = IRQ_RTC_TIC,
33 .flags = IORESOURCE_IRQ
34 }
35};
36
37struct platform_device s3c_device_rtc = {
38 .name = "s3c64xx-rtc",
39 .id = -1,
40 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
41 .resource = s3c_rtc_resource,
42};
43EXPORT_SYMBOL(s3c_device_rtc);
diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
new file mode 100644
index 000000000000..29c32d088515
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -0,0 +1,182 @@
1/* linux/arch/arm/plat-s3c64xx/dev-spi.c
2 *
3 * Copyright (C) 2009 Samsung Electronics Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/string.h>
13#include <linux/platform_device.h>
14#include <linux/dma-mapping.h>
15
16#include <mach/dma.h>
17#include <mach/map.h>
18#include <mach/gpio.h>
19#include <mach/gpio-bank-c.h>
20#include <mach/spi-clocks.h>
21
22#include <plat/s3c64xx-spi.h>
23#include <plat/gpio-cfg.h>
24#include <plat/irqs.h>
25
26static char *spi_src_clks[] = {
27 [S3C64XX_SPI_SRCCLK_PCLK] = "pclk",
28 [S3C64XX_SPI_SRCCLK_SPIBUS] = "spi-bus",
29 [S3C64XX_SPI_SRCCLK_48M] = "spi_48m",
30};
31
32/* SPI Controller platform_devices */
33
34/* Since we emulate multi-cs capability, we do not touch the GPC-3,7.
35 * The emulated CS is toggled by board specific mechanism, as it can
36 * be either some immediate GPIO or some signal out of some other
37 * chip in between ... or some yet another way.
38 * We simply do not assume anything about CS.
39 */
40static int s3c64xx_spi_cfg_gpio(struct platform_device *pdev)
41{
42 switch (pdev->id) {
43 case 0:
44 s3c_gpio_cfgpin(S3C64XX_GPC(0), S3C64XX_GPC0_SPI_MISO0);
45 s3c_gpio_cfgpin(S3C64XX_GPC(1), S3C64XX_GPC1_SPI_CLKO);
46 s3c_gpio_cfgpin(S3C64XX_GPC(2), S3C64XX_GPC2_SPI_MOSIO);
47 s3c_gpio_setpull(S3C64XX_GPC(0), S3C_GPIO_PULL_UP);
48 s3c_gpio_setpull(S3C64XX_GPC(1), S3C_GPIO_PULL_UP);
49 s3c_gpio_setpull(S3C64XX_GPC(2), S3C_GPIO_PULL_UP);
50 break;
51
52 case 1:
53 s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_SPI_MISO1);
54 s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_SPI_CLK1);
55 s3c_gpio_cfgpin(S3C64XX_GPC(6), S3C64XX_GPC6_SPI_MOSI1);
56 s3c_gpio_setpull(S3C64XX_GPC(4), S3C_GPIO_PULL_UP);
57 s3c_gpio_setpull(S3C64XX_GPC(5), S3C_GPIO_PULL_UP);
58 s3c_gpio_setpull(S3C64XX_GPC(6), S3C_GPIO_PULL_UP);
59 break;
60
61 default:
62 dev_err(&pdev->dev, "Invalid SPI Controller number!");
63 return -EINVAL;
64 }
65
66 return 0;
67}
68
69static struct resource s3c64xx_spi0_resource[] = {
70 [0] = {
71 .start = S3C64XX_PA_SPI0,
72 .end = S3C64XX_PA_SPI0 + 0x100 - 1,
73 .flags = IORESOURCE_MEM,
74 },
75 [1] = {
76 .start = DMACH_SPI0_TX,
77 .end = DMACH_SPI0_TX,
78 .flags = IORESOURCE_DMA,
79 },
80 [2] = {
81 .start = DMACH_SPI0_RX,
82 .end = DMACH_SPI0_RX,
83 .flags = IORESOURCE_DMA,
84 },
85 [3] = {
86 .start = IRQ_SPI0,
87 .end = IRQ_SPI0,
88 .flags = IORESOURCE_IRQ,
89 },
90};
91
92static struct s3c64xx_spi_info s3c64xx_spi0_pdata = {
93 .cfg_gpio = s3c64xx_spi_cfg_gpio,
94 .fifo_lvl_mask = 0x7f,
95 .rx_lvl_offset = 13,
96};
97
98static u64 spi_dmamask = DMA_BIT_MASK(32);
99
100struct platform_device s3c64xx_device_spi0 = {
101 .name = "s3c64xx-spi",
102 .id = 0,
103 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
104 .resource = s3c64xx_spi0_resource,
105 .dev = {
106 .dma_mask = &spi_dmamask,
107 .coherent_dma_mask = DMA_BIT_MASK(32),
108 .platform_data = &s3c64xx_spi0_pdata,
109 },
110};
111EXPORT_SYMBOL(s3c64xx_device_spi0);
112
113static struct resource s3c64xx_spi1_resource[] = {
114 [0] = {
115 .start = S3C64XX_PA_SPI1,
116 .end = S3C64XX_PA_SPI1 + 0x100 - 1,
117 .flags = IORESOURCE_MEM,
118 },
119 [1] = {
120 .start = DMACH_SPI1_TX,
121 .end = DMACH_SPI1_TX,
122 .flags = IORESOURCE_DMA,
123 },
124 [2] = {
125 .start = DMACH_SPI1_RX,
126 .end = DMACH_SPI1_RX,
127 .flags = IORESOURCE_DMA,
128 },
129 [3] = {
130 .start = IRQ_SPI1,
131 .end = IRQ_SPI1,
132 .flags = IORESOURCE_IRQ,
133 },
134};
135
136static struct s3c64xx_spi_info s3c64xx_spi1_pdata = {
137 .cfg_gpio = s3c64xx_spi_cfg_gpio,
138 .fifo_lvl_mask = 0x7f,
139 .rx_lvl_offset = 13,
140};
141
142struct platform_device s3c64xx_device_spi1 = {
143 .name = "s3c64xx-spi",
144 .id = 1,
145 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
146 .resource = s3c64xx_spi1_resource,
147 .dev = {
148 .dma_mask = &spi_dmamask,
149 .coherent_dma_mask = DMA_BIT_MASK(32),
150 .platform_data = &s3c64xx_spi1_pdata,
151 },
152};
153EXPORT_SYMBOL(s3c64xx_device_spi1);
154
155void __init s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
156{
157 struct s3c64xx_spi_info *pd;
158
159 /* Reject invalid configuration */
160 if (!num_cs || src_clk_nr < 0
161 || src_clk_nr > S3C64XX_SPI_SRCCLK_48M) {
162 printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
163 return;
164 }
165
166 switch (cntrlr) {
167 case 0:
168 pd = &s3c64xx_spi0_pdata;
169 break;
170 case 1:
171 pd = &s3c64xx_spi1_pdata;
172 break;
173 default:
174 printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
175 __func__, cntrlr);
176 return;
177 }
178
179 pd->num_cs = num_cs;
180 pd->src_clk_nr = src_clk_nr;
181 pd->src_clk_name = spi_src_clks[src_clk_nr];
182}
diff --git a/arch/arm/mach-s3c64xx/dev-uart.c b/arch/arm/mach-s3c64xx/dev-uart.c
new file mode 100644
index 000000000000..f797f748b999
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/dev-uart.c
@@ -0,0 +1,147 @@
1/* linux/arch/arm/plat-s3c64xx/dev-uart.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * Base S3C64XX UART resource and device definitions
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14*/
15
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/interrupt.h>
19#include <linux/list.h>
20#include <linux/platform_device.h>
21
22#include <asm/mach/arch.h>
23#include <asm/mach/irq.h>
24#include <mach/hardware.h>
25#include <mach/map.h>
26
27#include <plat/devs.h>
28
29/* Serial port registrations */
30
31/* 64xx uarts are closer together */
32
33static struct resource s3c64xx_uart0_resource[] = {
34 [0] = {
35 .start = S3C_PA_UART0,
36 .end = S3C_PA_UART0 + 0x100,
37 .flags = IORESOURCE_MEM,
38 },
39 [1] = {
40 .start = IRQ_S3CUART_RX0,
41 .end = IRQ_S3CUART_RX0,
42 .flags = IORESOURCE_IRQ,
43 },
44 [2] = {
45 .start = IRQ_S3CUART_TX0,
46 .end = IRQ_S3CUART_TX0,
47 .flags = IORESOURCE_IRQ,
48
49 },
50 [3] = {
51 .start = IRQ_S3CUART_ERR0,
52 .end = IRQ_S3CUART_ERR0,
53 .flags = IORESOURCE_IRQ,
54 }
55};
56
57static struct resource s3c64xx_uart1_resource[] = {
58 [0] = {
59 .start = S3C_PA_UART1,
60 .end = S3C_PA_UART1 + 0x100,
61 .flags = IORESOURCE_MEM,
62 },
63 [1] = {
64 .start = IRQ_S3CUART_RX1,
65 .end = IRQ_S3CUART_RX1,
66 .flags = IORESOURCE_IRQ,
67 },
68 [2] = {
69 .start = IRQ_S3CUART_TX1,
70 .end = IRQ_S3CUART_TX1,
71 .flags = IORESOURCE_IRQ,
72
73 },
74 [3] = {
75 .start = IRQ_S3CUART_ERR1,
76 .end = IRQ_S3CUART_ERR1,
77 .flags = IORESOURCE_IRQ,
78 },
79};
80
81static struct resource s3c6xx_uart2_resource[] = {
82 [0] = {
83 .start = S3C_PA_UART2,
84 .end = S3C_PA_UART2 + 0x100,
85 .flags = IORESOURCE_MEM,
86 },
87 [1] = {
88 .start = IRQ_S3CUART_RX2,
89 .end = IRQ_S3CUART_RX2,
90 .flags = IORESOURCE_IRQ,
91 },
92 [2] = {
93 .start = IRQ_S3CUART_TX2,
94 .end = IRQ_S3CUART_TX2,
95 .flags = IORESOURCE_IRQ,
96
97 },
98 [3] = {
99 .start = IRQ_S3CUART_ERR2,
100 .end = IRQ_S3CUART_ERR2,
101 .flags = IORESOURCE_IRQ,
102 },
103};
104
105static struct resource s3c64xx_uart3_resource[] = {
106 [0] = {
107 .start = S3C_PA_UART3,
108 .end = S3C_PA_UART3 + 0x100,
109 .flags = IORESOURCE_MEM,
110 },
111 [1] = {
112 .start = IRQ_S3CUART_RX3,
113 .end = IRQ_S3CUART_RX3,
114 .flags = IORESOURCE_IRQ,
115 },
116 [2] = {
117 .start = IRQ_S3CUART_TX3,
118 .end = IRQ_S3CUART_TX3,
119 .flags = IORESOURCE_IRQ,
120
121 },
122 [3] = {
123 .start = IRQ_S3CUART_ERR3,
124 .end = IRQ_S3CUART_ERR3,
125 .flags = IORESOURCE_IRQ,
126 },
127};
128
129
130struct s3c24xx_uart_resources s3c64xx_uart_resources[] __initdata = {
131 [0] = {
132 .resources = s3c64xx_uart0_resource,
133 .nr_resources = ARRAY_SIZE(s3c64xx_uart0_resource),
134 },
135 [1] = {
136 .resources = s3c64xx_uart1_resource,
137 .nr_resources = ARRAY_SIZE(s3c64xx_uart1_resource),
138 },
139 [2] = {
140 .resources = s3c6xx_uart2_resource,
141 .nr_resources = ARRAY_SIZE(s3c6xx_uart2_resource),
142 },
143 [3] = {
144 .resources = s3c64xx_uart3_resource,
145 .nr_resources = ARRAY_SIZE(s3c64xx_uart3_resource),
146 },
147};
diff --git a/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..9d0c43b4b687
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
@@ -0,0 +1,18 @@
1/* linux/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h
2 *
3 * Copyright (C) 2009 Samsung Electronics Ltd.
4 * Jaswinder Singh <jassi.brar@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __S3C64XX_PLAT_SPI_CLKS_H
12#define __S3C64XX_PLAT_SPI_CLKS_H __FILE__
13
14#define S3C64XX_SPI_SRCCLK_PCLK 0
15#define S3C64XX_SPI_SRCCLK_SPIBUS 1
16#define S3C64XX_SPI_SRCCLK_48M 2
17
18#endif /* __S3C64XX_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
new file mode 100644
index 000000000000..8e28e448dd20
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/setup-fb-24bpp.c
@@ -0,0 +1,37 @@
1/* linux/arch/arm/plat-s3c64xx/setup-fb-24bpp.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * Base S3C64XX setup information for 24bpp LCD framebuffer
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/fb.h>
18
19#include <mach/regs-fb.h>
20#include <mach/gpio.h>
21#include <plat/fb.h>
22#include <plat/gpio-cfg.h>
23
24extern void s3c64xx_fb_gpio_setup_24bpp(void)
25{
26 unsigned int gpio;
27
28 for (gpio = S3C64XX_GPI(0); gpio <= S3C64XX_GPI(15); gpio++) {
29 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
30 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
31 }
32
33 for (gpio = S3C64XX_GPJ(0); gpio <= S3C64XX_GPJ(11); gpio++) {
34 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
35 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
36 }
37}
diff --git a/arch/arm/mach-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c64xx/setup-i2c0.c
new file mode 100644
index 000000000000..d1b11e6e77e8
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/setup-i2c0.c
@@ -0,0 +1,31 @@
1/* linux/arch/arm/plat-s3c64xx/setup-i2c0.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * Base S3C64XX I2C bus 0 gpio configuration
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17
18struct platform_device; /* don't need the contents */
19
20#include <mach/gpio.h>
21#include <mach/gpio-bank-b.h>
22#include <plat/iic.h>
23#include <plat/gpio-cfg.h>
24
25void s3c_i2c0_cfg_gpio(struct platform_device *dev)
26{
27 s3c_gpio_cfgpin(S3C64XX_GPB(5), S3C64XX_GPB5_I2C_SCL0);
28 s3c_gpio_cfgpin(S3C64XX_GPB(6), S3C64XX_GPB6_I2C_SDA0);
29 s3c_gpio_setpull(S3C64XX_GPB(5), S3C_GPIO_PULL_UP);
30 s3c_gpio_setpull(S3C64XX_GPB(6), S3C_GPIO_PULL_UP);
31}
diff --git a/arch/arm/mach-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c64xx/setup-i2c1.c
new file mode 100644
index 000000000000..2dce57d8c6f8
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/setup-i2c1.c
@@ -0,0 +1,31 @@
1/* linux/arch/arm/plat-s3c64xx/setup-i2c1.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * Base S3C64XX I2C bus 1 gpio configuration
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17
18struct platform_device; /* don't need the contents */
19
20#include <mach/gpio.h>
21#include <mach/gpio-bank-b.h>
22#include <plat/iic.h>
23#include <plat/gpio-cfg.h>
24
25void s3c_i2c1_cfg_gpio(struct platform_device *dev)
26{
27 s3c_gpio_cfgpin(S3C64XX_GPB(2), S3C64XX_GPB2_I2C_SCL1);
28 s3c_gpio_cfgpin(S3C64XX_GPB(3), S3C64XX_GPB3_I2C_SDA1);
29 s3c_gpio_setpull(S3C64XX_GPB(2), S3C_GPIO_PULL_UP);
30 s3c_gpio_setpull(S3C64XX_GPB(3), S3C_GPIO_PULL_UP);
31}
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
new file mode 100644
index 000000000000..a58c0cc7ba5e
--- /dev/null
+++ b/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c
@@ -0,0 +1,75 @@
1/* linux/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * S3C64XX - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/platform_device.h>
18#include <linux/io.h>
19
20#include <mach/gpio.h>
21#include <plat/gpio-cfg.h>
22
23void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
24{
25 unsigned int gpio;
26 unsigned int end;
27
28 end = S3C64XX_GPG(2 + width);
29
30 /* Set all the necessary GPG pins to special-function 0 */
31 for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) {
32 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
33 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
34 }
35
36 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
37 s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2));
38}
39
40void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
41{
42 unsigned int gpio;
43 unsigned int end;
44
45 end = S3C64XX_GPH(2 + width);
46
47 /* Set all the necessary GPG pins to special-function 0 */
48 for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) {
49 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
50 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
51 }
52
53 s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP);
54 s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3));
55}
56
57void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
58{
59 unsigned int gpio;
60 unsigned int end;
61
62 end = S3C64XX_GPH(6 + width);
63
64 /* Set all the necessary GPH pins to special-function 1 */
65 for (gpio = S3C64XX_GPH(6); gpio < end; gpio++) {
66 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
67 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
68 }
69
70 /* Set all the necessary GPC pins to special-function 1 */
71 for (gpio = S3C64XX_GPC(4); gpio < S3C64XX_GPC(6); gpio++) {
72 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
73 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
74 }
75}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 19:16:28 -0500