diff options
author | Darius Augulis <augulis.darius@gmail.com> | 2010-09-09 08:40:22 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-09-17 20:54:55 -0400 |
commit | 591cd25ee35986184870c447ff5c12e78bc80699 (patch) | |
tree | 1ad6cb2d5ba2a62c232430d65286688c255c9199 /arch/arm/mach-s3c64xx | |
parent | 5343795fda222183c1f77d0f5870f2027713bb0d (diff) |
ARM: S3C64XX: Fix coding style errors on mach-real6410
Fix errors reported by checkpatch.pl script
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
[kgene.kim@samsung.com: minor title fix]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c64xx')
-rw-r--r-- | arch/arm/mach-s3c64xx/mach-real6410.c | 104 |
1 files changed, 52 insertions, 52 deletions
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c index 5c07d013b23d..9f79e6bacb59 100644 --- a/arch/arm/mach-s3c64xx/mach-real6410.c +++ b/arch/arm/mach-s3c64xx/mach-real6410.c | |||
@@ -30,73 +30,73 @@ | |||
30 | #include <plat/devs.h> | 30 | #include <plat/devs.h> |
31 | #include <plat/regs-serial.h> | 31 | #include <plat/regs-serial.h> |
32 | 32 | ||
33 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | 33 | #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK) |
34 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | 34 | #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) |
35 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | 35 | #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) |
36 | 36 | ||
37 | static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = { | 37 | static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = { |
38 | [0] = { | 38 | [0] = { |
39 | .hwport = 0, | 39 | .hwport = 0, |
40 | .flags = 0, | 40 | .flags = 0, |
41 | .ucon = UCON, | 41 | .ucon = UCON, |
42 | .ulcon = ULCON, | 42 | .ulcon = ULCON, |
43 | .ufcon = UFCON, | 43 | .ufcon = UFCON, |
44 | }, | 44 | }, |
45 | [1] = { | 45 | [1] = { |
46 | .hwport = 1, | 46 | .hwport = 1, |
47 | .flags = 0, | 47 | .flags = 0, |
48 | .ucon = UCON, | 48 | .ucon = UCON, |
49 | .ulcon = ULCON, | 49 | .ulcon = ULCON, |
50 | .ufcon = UFCON, | 50 | .ufcon = UFCON, |
51 | }, | 51 | }, |
52 | [2] = { | 52 | [2] = { |
53 | .hwport = 2, | 53 | .hwport = 2, |
54 | .flags = 0, | 54 | .flags = 0, |
55 | .ucon = UCON, | 55 | .ucon = UCON, |
56 | .ulcon = ULCON, | 56 | .ulcon = ULCON, |
57 | .ufcon = UFCON, | 57 | .ufcon = UFCON, |
58 | }, | 58 | }, |
59 | [3] = { | 59 | [3] = { |
60 | .hwport = 3, | 60 | .hwport = 3, |
61 | .flags = 0, | 61 | .flags = 0, |
62 | .ucon = UCON, | 62 | .ucon = UCON, |
63 | .ulcon = ULCON, | 63 | .ulcon = ULCON, |
64 | .ufcon = UFCON, | 64 | .ufcon = UFCON, |
65 | }, | 65 | }, |
66 | }; | 66 | }; |
67 | 67 | ||
68 | /* DM9000AEP 10/100 ethernet controller */ | 68 | /* DM9000AEP 10/100 ethernet controller */ |
69 | 69 | ||
70 | static struct resource real6410_dm9k_resource[] = { | 70 | static struct resource real6410_dm9k_resource[] = { |
71 | [0] = { | 71 | [0] = { |
72 | .start = S3C64XX_PA_XM0CSN1, | 72 | .start = S3C64XX_PA_XM0CSN1, |
73 | .end = S3C64XX_PA_XM0CSN1 + 1, | 73 | .end = S3C64XX_PA_XM0CSN1 + 1, |
74 | .flags = IORESOURCE_MEM | 74 | .flags = IORESOURCE_MEM |
75 | }, | 75 | }, |
76 | [1] = { | 76 | [1] = { |
77 | .start = S3C64XX_PA_XM0CSN1 + 4, | 77 | .start = S3C64XX_PA_XM0CSN1 + 4, |
78 | .end = S3C64XX_PA_XM0CSN1 + 5, | 78 | .end = S3C64XX_PA_XM0CSN1 + 5, |
79 | .flags = IORESOURCE_MEM | 79 | .flags = IORESOURCE_MEM |
80 | }, | 80 | }, |
81 | [2] = { | 81 | [2] = { |
82 | .start = S3C_EINT(7), | 82 | .start = S3C_EINT(7), |
83 | .end = S3C_EINT(7), | 83 | .end = S3C_EINT(7), |
84 | .flags = IORESOURCE_IRQ, | 84 | .flags = IORESOURCE_IRQ, |
85 | } | 85 | } |
86 | }; | 86 | }; |
87 | 87 | ||
88 | static struct dm9000_plat_data real6410_dm9k_pdata = { | 88 | static struct dm9000_plat_data real6410_dm9k_pdata = { |
89 | .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), | 89 | .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), |
90 | }; | 90 | }; |
91 | 91 | ||
92 | static struct platform_device real6410_device_eth = { | 92 | static struct platform_device real6410_device_eth = { |
93 | .name = "dm9000", | 93 | .name = "dm9000", |
94 | .id = -1, | 94 | .id = -1, |
95 | .num_resources = ARRAY_SIZE(real6410_dm9k_resource), | 95 | .num_resources = ARRAY_SIZE(real6410_dm9k_resource), |
96 | .resource = real6410_dm9k_resource, | 96 | .resource = real6410_dm9k_resource, |
97 | .dev = { | 97 | .dev = { |
98 | .platform_data = &real6410_dm9k_pdata, | 98 | .platform_data = &real6410_dm9k_pdata, |
99 | }, | 99 | }, |
100 | }; | 100 | }; |
101 | 101 | ||
102 | static struct platform_device *real6410_devices[] __initdata = { | 102 | static struct platform_device *real6410_devices[] __initdata = { |
@@ -129,12 +129,12 @@ static void __init real6410_machine_init(void) | |||
129 | /* set timing for nCS1 suitable for ethernet chip */ | 129 | /* set timing for nCS1 suitable for ethernet chip */ |
130 | 130 | ||
131 | __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | | 131 | __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | |
132 | (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | | 132 | (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | |
133 | (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | | 133 | (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | |
134 | (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | | 134 | (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | |
135 | (13 << S3C64XX_SROM_BCX__TACC__SHIFT) | | 135 | (13 << S3C64XX_SROM_BCX__TACC__SHIFT) | |
136 | (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | | 136 | (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | |
137 | (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); | 137 | (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); |
138 | 138 | ||
139 | platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices)); | 139 | platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices)); |
140 | } | 140 | } |