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authorMark Brown <broonie@opensource.wolfsonmicro.com>2011-12-03 05:49:26 -0500
committerKukjin Kim <kgene.kim@samsung.com>2011-12-03 05:49:26 -0500
commit51ccd81d9b1220ac1729434ac1ed5b0142001097 (patch)
tree43f36bbaaa9d61619e08ad3792c24974d1ed97b1 /arch/arm/mach-s3c64xx/pm.c
parentc5c32c965dad8456dd2f6e7c1b05183258593e75 (diff)
ARM: S3C64XX: Power gate unused domains
The S3C64xx CPUs have power gating support with a series of software controllable power domains in the SoC. To take full advantage of these we should implement runtime PM support but since several of the IP blocks have no in tree drivers (and at this point aren't likely to acquire such drivers) we can get some benefit from the hardware much more easily if we just turn those blocks off unconditionally. This will cut down on the leakage these domains generate without interfering with active usage. Do this for: - Domain G: 3D acceleration - Domain V: MFC - Domain I: JPEG and camera interface - Domain P: 2D acceleration, TV encoder and scaler This is easy to reverse if any of these devices do acquire drivers in the future or as part of out of tree patches for them. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c64xx/pm.c')
-rw-r--r--arch/arm/mach-s3c64xx/pm.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index b375cd5c47cb..0868d1331912 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -89,6 +89,8 @@ static struct sleep_save misc_save[] = {
89 89
90 SAVE_ITEM(S3C64XX_SDMA_SEL), 90 SAVE_ITEM(S3C64XX_SDMA_SEL),
91 SAVE_ITEM(S3C64XX_MODEM_MIFPCON), 91 SAVE_ITEM(S3C64XX_MODEM_MIFPCON),
92
93 SAVE_ITEM(S3C64XX_NORMAL_CFG),
92}; 94};
93 95
94void s3c_pm_configure_extint(void) 96void s3c_pm_configure_extint(void)
@@ -181,10 +183,23 @@ static void s3c64xx_pm_prepare(void)
181 183
182static int s3c64xx_pm_init(void) 184static int s3c64xx_pm_init(void)
183{ 185{
186 u32 val;
187
184 pm_cpu_prep = s3c64xx_pm_prepare; 188 pm_cpu_prep = s3c64xx_pm_prepare;
185 pm_cpu_sleep = s3c64xx_cpu_suspend; 189 pm_cpu_sleep = s3c64xx_cpu_suspend;
186 pm_uart_udivslot = 1; 190 pm_uart_udivslot = 1;
187 191
192 /*
193 * Unconditionally disable power domains that contain only
194 * blocks which have no mainline driver support.
195 */
196 val = __raw_readl(S3C64XX_NORMAL_CFG);
197 val &= ~(S3C64XX_NORMALCFG_DOMAIN_G_ON |
198 S3C64XX_NORMALCFG_DOMAIN_V_ON |
199 S3C64XX_NORMALCFG_DOMAIN_I_ON |
200 S3C64XX_NORMALCFG_DOMAIN_P_ON);
201 __raw_writel(val, S3C64XX_NORMAL_CFG);
202
188#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK 203#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
189 gpio_request(S3C64XX_GPN(12), "DEBUG_LED0"); 204 gpio_request(S3C64XX_GPN(12), "DEBUG_LED0");
190 gpio_request(S3C64XX_GPN(13), "DEBUG_LED1"); 205 gpio_request(S3C64XX_GPN(13), "DEBUG_LED1");