diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-12 19:00:54 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-12 19:00:54 -0500 |
commit | dca1d9f6d7ae428c193f32bd3e9a4ca13176648b (patch) | |
tree | 02de8c3503c1c811754423d2fa3f3b4978044f6e /arch/arm/mach-s3c64xx/irq.c | |
parent | 9ff99339447de403a46be5e3f23d0c794d540b06 (diff) | |
parent | 91e013827c0bcbb187ecf02213c5446b6f62d445 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (370 commits)
ARM: S3C2443: Add set_rate and round_rate calls for armdiv clock
ARM: S3C2443: Remove #if 0 for clk_mpll
ARM: S3C2443: Update notes on MPLLREF clock
ARM: S3C2443: Further clksrc-clk conversions
ARM: S3C2443: Change to using plat-samsung clksrc-clk implementation
USB: Fix s3c-hsotg build following Samsung platform header moves
ARM: S3C64XX: Reintroduce unconditional build of audio device
ARM: 5961/1: ux500: fix CLKRST addresses
ARM: 5977/1: arm: Enable backtrace printing on oops when PC is corrupted
ASoC: Fix S3C64xx IIS driver for Samsung header reorg
ARM: S3C2440: Fix plat-s3c24xx move of s3c2440/s3c2442 support
[ARM] pxa: fix typo in mxm8x10.h
[ARM] pxa/raumfeld: set GPIO drive bits for LED pins
[ARM] pxa/zeus: Add support for mcp2515 CAN bus
[ARM] pxa/zeus: Add support for onboard max6369 watchdog
[ARM] pxa/zeus: Add Eurotech as the manufacturer
[ARM] pxa/zeus: Correct the USB host initialisation flags
[ARM] pxa/zeus: Allow usage of 8250-compatible UART in uncompress
[ARM] pxa: refactor uncompress.h for non-PXA uarts
[ARM] mmp2: fix incorrect calling of chip->mask_ack() for 2nd level cascaded IRQs
...
Diffstat (limited to 'arch/arm/mach-s3c64xx/irq.c')
-rw-r--r-- | arch/arm/mach-s3c64xx/irq.c | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c64xx/irq.c b/arch/arm/mach-s3c64xx/irq.c new file mode 100644 index 000000000000..67a145d440f3 --- /dev/null +++ b/arch/arm/mach-s3c64xx/irq.c | |||
@@ -0,0 +1,69 @@ | |||
1 | /* arch/arm/plat-s3c64xx/irq.c | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64XX - Interrupt handling | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/serial_core.h> | ||
18 | #include <linux/irq.h> | ||
19 | #include <linux/io.h> | ||
20 | |||
21 | #include <asm/hardware/vic.h> | ||
22 | |||
23 | #include <mach/map.h> | ||
24 | #include <plat/irq-vic-timer.h> | ||
25 | #include <plat/irq-uart.h> | ||
26 | #include <plat/cpu.h> | ||
27 | |||
28 | static struct s3c_uart_irq uart_irqs[] = { | ||
29 | [0] = { | ||
30 | .regs = S3C_VA_UART0, | ||
31 | .base_irq = IRQ_S3CUART_BASE0, | ||
32 | .parent_irq = IRQ_UART0, | ||
33 | }, | ||
34 | [1] = { | ||
35 | .regs = S3C_VA_UART1, | ||
36 | .base_irq = IRQ_S3CUART_BASE1, | ||
37 | .parent_irq = IRQ_UART1, | ||
38 | }, | ||
39 | [2] = { | ||
40 | .regs = S3C_VA_UART2, | ||
41 | .base_irq = IRQ_S3CUART_BASE2, | ||
42 | .parent_irq = IRQ_UART2, | ||
43 | }, | ||
44 | [3] = { | ||
45 | .regs = S3C_VA_UART3, | ||
46 | .base_irq = IRQ_S3CUART_BASE3, | ||
47 | .parent_irq = IRQ_UART3, | ||
48 | }, | ||
49 | }; | ||
50 | |||
51 | |||
52 | void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) | ||
53 | { | ||
54 | printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); | ||
55 | |||
56 | /* initialise the pair of VICs */ | ||
57 | vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, 0); | ||
58 | vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, 0); | ||
59 | |||
60 | /* add the timer sub-irqs */ | ||
61 | |||
62 | s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0); | ||
63 | s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1); | ||
64 | s3c_init_vic_timer_irq(IRQ_TIMER2_VIC, IRQ_TIMER2); | ||
65 | s3c_init_vic_timer_irq(IRQ_TIMER3_VIC, IRQ_TIMER3); | ||
66 | s3c_init_vic_timer_irq(IRQ_TIMER4_VIC, IRQ_TIMER4); | ||
67 | |||
68 | s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs)); | ||
69 | } | ||