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authorLinus Torvalds <torvalds@linux-foundation.org>2010-08-11 12:13:19 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-08-11 12:13:19 -0400
commit636d17427b1ef0e97bd9df9b3b0e0f314ff889d3 (patch)
treef573602c1a78e9140c36e220c47675b79af1c270 /arch/arm/mach-s3c64xx/include/mach
parentdd21e9bdff14a9882f2c485fe533c6ce64ea2675 (diff)
parent0b019a41553a919965bb02d07d54e3e6c57a796d (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (226 commits) ARM: 6323/1: cam60: don't use __init for cam60_spi_{flash_platform_data,partitions} ARM: 6324/1: cam60: move cam60_spi_devices to .init.data ARM: 6322/1: imx/pca100: Fix name of spi platform data ARM: 6321/1: fix syntax error in main Kconfig file ARM: 6297/1: move U300 timer to dynamic clock lookup ARM: 6296/1: clock U300 intcon and timer properly ARM: 6295/1: fix U300 apb_pclk split ARM: 6306/1: fix inverted MMC card detect in U300 ARM: 6299/1: errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID ARM: 6294/1: etm: do a dummy read from OSSRR during initialization ARM: 6292/1: coresight: add ETM management registers ARM: 6288/1: ftrace: document mcount formats ARM: 6287/1: ftrace: clean up mcount assembly indentation ARM: 6286/1: fix Thumb-2 decompressor broken by "Auto calculate ZRELADDR" ARM: 6281/1: video/imxfb.c: allow usage without BACKLIGHT_CLASS_DEVICE ARM: 6280/1: imx: Fix build failure when including <mach/gpio.h> without <linux/spinlock.h> ARM: S5PV210: Fix on missing s3c-sdhci card detection method for hsmmc3 ARM: S5P: Fix on missing S5P_DEV_FIMC in plat-s5p/Kconfig ARM: S5PV210: Override FIMC driver name on Aquila board ARM: S5PC100: enable FIMC on SMDKC100 ... Fix up conflicts in arch/arm/mach-{s5pc100,s5pv210}/cpu.c due to different subsystem 'setname' calls, and trivial port types in include/linux/serial_core.h
Diffstat (limited to 'arch/arm/mach-s3c64xx/include/mach')
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/map.h6
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-clock.h5
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index e1eab3c94aea..a1f13f02c841 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -67,6 +67,7 @@
67#define S3C64XX_PA_USB_HSOTG (0x7C000000) 67#define S3C64XX_PA_USB_HSOTG (0x7C000000)
68#define S3C64XX_PA_WATCHDOG (0x7E004000) 68#define S3C64XX_PA_WATCHDOG (0x7E004000)
69#define S3C64XX_PA_RTC (0x7E005000) 69#define S3C64XX_PA_RTC (0x7E005000)
70#define S3C64XX_PA_KEYPAD (0x7E00A000)
70#define S3C64XX_PA_ADC (0x7E00B000) 71#define S3C64XX_PA_ADC (0x7E00B000)
71#define S3C64XX_PA_SYSCON (0x7E00F000) 72#define S3C64XX_PA_SYSCON (0x7E00F000)
72#define S3C64XX_PA_AC97 (0x7F001000) 73#define S3C64XX_PA_AC97 (0x7F001000)
@@ -86,6 +87,9 @@
86#define S3C64XX_SZ_GPIO SZ_4K 87#define S3C64XX_SZ_GPIO SZ_4K
87 88
88#define S3C64XX_PA_SDRAM (0x50000000) 89#define S3C64XX_PA_SDRAM (0x50000000)
90
91#define S3C64XX_PA_CFCON (0x70300000)
92
89#define S3C64XX_PA_VIC0 (0x71200000) 93#define S3C64XX_PA_VIC0 (0x71200000)
90#define S3C64XX_PA_VIC1 (0x71300000) 94#define S3C64XX_PA_VIC1 (0x71300000)
91 95
@@ -120,5 +124,7 @@
120#define S3C_PA_WDT S3C64XX_PA_WATCHDOG 124#define S3C_PA_WDT S3C64XX_PA_WATCHDOG
121 125
122#define SAMSUNG_PA_ADC S3C64XX_PA_ADC 126#define SAMSUNG_PA_ADC S3C64XX_PA_ADC
127#define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON
128#define SAMSUNG_PA_KEYPAD S3C64XX_PA_KEYPAD
123 129
124#endif /* __ASM_ARCH_6400_MAP_H */ 130#endif /* __ASM_ARCH_6400_MAP_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
index 0114eb0c1fe7..05332b998ec0 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
@@ -34,6 +34,7 @@
34#define S3C_SCLK_GATE S3C_CLKREG(0x38) 34#define S3C_SCLK_GATE S3C_CLKREG(0x38)
35#define S3C_MEM0_GATE S3C_CLKREG(0x3C) 35#define S3C_MEM0_GATE S3C_CLKREG(0x3C)
36#define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C) 36#define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C)
37#define S3C_MEM_SYS_CFG S3C_CLKREG(0x120)
37 38
38/* CLKDIV0 */ 39/* CLKDIV0 */
39#define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12) 40#define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12)
@@ -154,4 +155,8 @@
154#define S3C6400_CLKSRC_EPLL_MOUT_SHIFT (2) 155#define S3C6400_CLKSRC_EPLL_MOUT_SHIFT (2)
155#define S3C6400_CLKSRC_MFC (1 << 4) 156#define S3C6400_CLKSRC_MFC (1 << 4)
156 157
158/* MEM_SYS_CFG */
159#define MEM_SYS_CFG_INDEP_CF 0x4000
160#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30
161
157#endif /* _PLAT_REGS_CLOCK_H */ 162#endif /* _PLAT_REGS_CLOCK_H */