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authorBen Dooks <ben-linux@fluff.org>2010-05-27 01:57:27 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-10-22 22:49:02 -0400
commitf5321760ce1d65fd69facc982b8523b19edf07a0 (patch)
treed605203837ac0ebb2af8a8f7165fa70d05c3b821 /arch/arm/mach-s3c64xx/dev-audio.c
parent4b46fbba607ef99f1aab3b77bfc1dc25464df5a6 (diff)
ARM: S3C64XX: Change dev-audio.c to use S3C_GPIO_SFN() for special functions
To aide in changing the gpio code, remove the use of pin-specific configs and move to using the S3C_GPIO_SFN() versions. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c64xx/dev-audio.c')
-rw-r--r--arch/arm/mach-s3c64xx/dev-audio.c79
1 files changed, 37 insertions, 42 deletions
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c
index 9648fbc36eec..c9a44969e648 100644
--- a/arch/arm/mach-s3c64xx/dev-audio.c
+++ b/arch/arm/mach-s3c64xx/dev-audio.c
@@ -22,27 +22,22 @@
22#include <plat/audio.h> 22#include <plat/audio.h>
23#include <plat/gpio-cfg.h> 23#include <plat/gpio-cfg.h>
24 24
25#include <mach/gpio-bank-c.h>
26#include <mach/gpio-bank-d.h>
27#include <mach/gpio-bank-e.h>
28#include <mach/gpio-bank-h.h>
29
30static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) 25static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
31{ 26{
32 switch (pdev->id) { 27 switch (pdev->id) {
33 case 0: 28 case 0:
34 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK); 29 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(3));
35 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK); 30 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(3));
36 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK); 31 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(3));
37 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI); 32 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(3));
38 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0); 33 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(3));
39 break; 34 break;
40 case 1: 35 case 1:
41 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK); 36 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(3));
42 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK); 37 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(3));
43 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK); 38 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(3));
44 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI); 39 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(3));
45 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0); 40 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(3));
46 default: 41 default:
47 printk(KERN_DEBUG "Invalid I2S Controller number!"); 42 printk(KERN_DEBUG "Invalid I2S Controller number!");
48 return -EINVAL; 43 return -EINVAL;
@@ -53,13 +48,13 @@ static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
53 48
54static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev) 49static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev)
55{ 50{
56 s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0); 51 s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5));
57 s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1); 52 s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5));
58 s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2); 53 s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5));
59 s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK); 54 s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C_GPIO_SFN(4));
60 s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK); 55 s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C_GPIO_SFN(4));
61 s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK); 56 s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C_GPIO_SFN(4));
62 s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI); 57 s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C_GPIO_SFN(4));
63 58
64 return 0; 59 return 0;
65} 60}
@@ -170,18 +165,18 @@ static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
170{ 165{
171 switch (pdev->id) { 166 switch (pdev->id) {
172 case 0: 167 case 0:
173 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK); 168 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(2));
174 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK); 169 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(2));
175 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC); 170 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(2));
176 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN); 171 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(2));
177 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT); 172 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(2));
178 break; 173 break;
179 case 1: 174 case 1:
180 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK); 175 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(2));
181 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK); 176 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(2));
182 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC); 177 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(2));
183 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN); 178 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(2));
184 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT); 179 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(2));
185 break; 180 break;
186 default: 181 default:
187 printk(KERN_DEBUG "Invalid PCM Controller number!"); 182 printk(KERN_DEBUG "Invalid PCM Controller number!");
@@ -261,22 +256,22 @@ EXPORT_SYMBOL(s3c64xx_device_pcm1);
261 256
262static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev) 257static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev)
263{ 258{
264 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_AC97_BITCLK); 259 s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(4));
265 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_AC97_nRESET); 260 s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(4));
266 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_AC97_SYNC); 261 s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(4));
267 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_AC97_SDI); 262 s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(4));
268 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_AC97_SDO); 263 s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(4));
269 264
270 return 0; 265 return 0;
271} 266}
272 267
273static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev) 268static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev)
274{ 269{
275 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_AC97_BITCLK); 270 s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(4));
276 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_AC97_nRESET); 271 s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(4));
277 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_AC97_SYNC); 272 s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(4));
278 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_AC97_SDI); 273 s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(4));
279 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_AC97_SDO); 274 s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(4));
280 275
281 return 0; 276 return 0;
282} 277}