diff options
author | Ben Dooks <ben-linux@fluff.org> | 2010-05-27 02:54:06 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-22 22:49:09 -0400 |
commit | 2618b555d2734df3c8ca71df319d318489318083 (patch) | |
tree | 769a8f009d384beefe9419449cf5536f11a9a2d4 /arch/arm/mach-s3c64xx/dev-audio.c | |
parent | f5321760ce1d65fd69facc982b8523b19edf07a0 (diff) |
ARM: S3C64XX: Change to using s3c_gpio_cfgpin_range()
Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to
use the recently introduced s3c_gpio_cfgpin_range().
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c64xx/dev-audio.c')
-rw-r--r-- | arch/arm/mach-s3c64xx/dev-audio.c | 53 |
1 files changed, 15 insertions, 38 deletions
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c index c9a44969e648..e4bb02395d9e 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c64xx/dev-audio.c | |||
@@ -24,25 +24,22 @@ | |||
24 | 24 | ||
25 | static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) | 25 | static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev) |
26 | { | 26 | { |
27 | unsigned int base; | ||
28 | |||
27 | switch (pdev->id) { | 29 | switch (pdev->id) { |
28 | case 0: | 30 | case 0: |
29 | s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(3)); | 31 | base = S3C64XX_GPD(0); |
30 | s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(3)); | ||
31 | s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(3)); | ||
32 | s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(3)); | ||
33 | s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(3)); | ||
34 | break; | 32 | break; |
35 | case 1: | 33 | case 1: |
36 | s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(3)); | 34 | base = S3C64XX_GPE(0); |
37 | s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(3)); | 35 | break; |
38 | s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(3)); | ||
39 | s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(3)); | ||
40 | s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(3)); | ||
41 | default: | 36 | default: |
42 | printk(KERN_DEBUG "Invalid I2S Controller number!"); | 37 | printk(KERN_DEBUG "Invalid I2S Controller number!"); |
43 | return -EINVAL; | 38 | return -EINVAL; |
44 | } | 39 | } |
45 | 40 | ||
41 | s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(3)); | ||
42 | |||
46 | return 0; | 43 | return 0; |
47 | } | 44 | } |
48 | 45 | ||
@@ -51,10 +48,7 @@ static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev) | |||
51 | s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5)); | 48 | s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C_GPIO_SFN(5)); |
52 | s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5)); | 49 | s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C_GPIO_SFN(5)); |
53 | s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5)); | 50 | s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C_GPIO_SFN(5)); |
54 | s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C_GPIO_SFN(4)); | 51 | s3c_gpio_cfgpin_range(S3C64XX_GPH(6), 4, S3C_GPIO_SFN(4)); |
55 | s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C_GPIO_SFN(4)); | ||
56 | s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C_GPIO_SFN(4)); | ||
57 | s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C_GPIO_SFN(4)); | ||
58 | 52 | ||
59 | return 0; | 53 | return 0; |
60 | } | 54 | } |
@@ -163,26 +157,21 @@ EXPORT_SYMBOL(s3c64xx_device_iisv4); | |||
163 | 157 | ||
164 | static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev) | 158 | static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev) |
165 | { | 159 | { |
160 | unsigned int base; | ||
161 | |||
166 | switch (pdev->id) { | 162 | switch (pdev->id) { |
167 | case 0: | 163 | case 0: |
168 | s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(2)); | 164 | base = S3C64XX_GPD(0); |
169 | s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(2)); | ||
170 | s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(2)); | ||
171 | s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(2)); | ||
172 | s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(2)); | ||
173 | break; | 165 | break; |
174 | case 1: | 166 | case 1: |
175 | s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(2)); | 167 | base = S3C64XX_GPE(0); |
176 | s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(2)); | ||
177 | s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(2)); | ||
178 | s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(2)); | ||
179 | s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(2)); | ||
180 | break; | 168 | break; |
181 | default: | 169 | default: |
182 | printk(KERN_DEBUG "Invalid PCM Controller number!"); | 170 | printk(KERN_DEBUG "Invalid PCM Controller number!"); |
183 | return -EINVAL; | 171 | return -EINVAL; |
184 | } | 172 | } |
185 | 173 | ||
174 | s3c_gpio_cfgpin_range(base, 5, S3C_GPIO_SFN(2)); | ||
186 | return 0; | 175 | return 0; |
187 | } | 176 | } |
188 | 177 | ||
@@ -256,24 +245,12 @@ EXPORT_SYMBOL(s3c64xx_device_pcm1); | |||
256 | 245 | ||
257 | static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev) | 246 | static int s3c64xx_ac97_cfg_gpd(struct platform_device *pdev) |
258 | { | 247 | { |
259 | s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C_GPIO_SFN(4)); | 248 | return s3c_gpio_cfgpin_range(S3C64XX_GPD(0), 5, S3C_GPIO_SFN(4)); |
260 | s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C_GPIO_SFN(4)); | ||
261 | s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C_GPIO_SFN(4)); | ||
262 | s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C_GPIO_SFN(4)); | ||
263 | s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C_GPIO_SFN(4)); | ||
264 | |||
265 | return 0; | ||
266 | } | 249 | } |
267 | 250 | ||
268 | static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev) | 251 | static int s3c64xx_ac97_cfg_gpe(struct platform_device *pdev) |
269 | { | 252 | { |
270 | s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C_GPIO_SFN(4)); | 253 | return s3c_gpio_cfgpin_range(S3C64XX_GPE(0), 5, S3C_GPIO_SFN(4)); |
271 | s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C_GPIO_SFN(4)); | ||
272 | s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C_GPIO_SFN(4)); | ||
273 | s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C_GPIO_SFN(4)); | ||
274 | s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C_GPIO_SFN(4)); | ||
275 | |||
276 | return 0; | ||
277 | } | 254 | } |
278 | 255 | ||
279 | static struct resource s3c64xx_ac97_resource[] = { | 256 | static struct resource s3c64xx_ac97_resource[] = { |