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authorKukjin Kim <kgene.kim@samsung.com>2011-12-22 17:27:42 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-12-23 14:07:55 -0500
commitb024043b6d0d3feecb1de350de9762a00a79eda1 (patch)
tree3332b1af6ee802cc3bc8b6911d7f88754bf307ab /arch/arm/mach-s3c64xx/cpu.c
parent61b3875382bc335423ccd7cbf2736c70175a54dd (diff)
ARM: 7245/1: S3C64XX: introduce arch/arm/mach-s3c64xx/common.[ch]
This patch introduces common.[ch] which are used only in the arch/arm/mach-s3c64xx/ directory. The common.c file merges the cpu.c, irq.c and irq-eint.c which are used commonly on S3C64XX SoCs and the common.h file replaces with plat/s3c6400.h and plat/s3c6410.h files. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c64xx/cpu.c')
-rw-r--r--arch/arm/mach-s3c64xx/cpu.c161
1 files changed, 0 insertions, 161 deletions
diff --git a/arch/arm/mach-s3c64xx/cpu.c b/arch/arm/mach-s3c64xx/cpu.c
deleted file mode 100644
index de085b798aa4..000000000000
--- a/arch/arm/mach-s3c64xx/cpu.c
+++ /dev/null
@@ -1,161 +0,0 @@
1/* linux/arch/arm/plat-s3c64xx/cpu.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX CPU Support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
19#include <linux/sysdev.h>
20#include <linux/serial_core.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23#include <linux/dma-mapping.h>
24
25#include <mach/hardware.h>
26#include <mach/map.h>
27
28#include <asm/mach/arch.h>
29#include <asm/mach/map.h>
30
31#include <plat/regs-serial.h>
32
33#include <plat/cpu.h>
34#include <plat/devs.h>
35#include <plat/clock.h>
36
37#include <plat/s3c6400.h>
38#include <plat/s3c6410.h>
39
40/* table of supported CPUs */
41
42static const char name_s3c6400[] = "S3C6400";
43static const char name_s3c6410[] = "S3C6410";
44
45static struct cpu_table cpu_ids[] __initdata = {
46 {
47 .idcode = S3C6400_CPU_ID,
48 .idmask = S3C64XX_CPU_MASK,
49 .map_io = s3c6400_map_io,
50 .init_clocks = s3c6400_init_clocks,
51 .init_uarts = s3c6400_init_uarts,
52 .init = s3c6400_init,
53 .name = name_s3c6400,
54 }, {
55 .idcode = S3C6410_CPU_ID,
56 .idmask = S3C64XX_CPU_MASK,
57 .map_io = s3c6410_map_io,
58 .init_clocks = s3c6410_init_clocks,
59 .init_uarts = s3c6410_init_uarts,
60 .init = s3c6410_init,
61 .name = name_s3c6410,
62 },
63};
64
65/* minimal IO mapping */
66
67/* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */
68#define UART_OFFS (S3C_PA_UART & 0xfffff)
69
70static struct map_desc s3c_iodesc[] __initdata = {
71 {
72 .virtual = (unsigned long)S3C_VA_SYS,
73 .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON),
74 .length = SZ_4K,
75 .type = MT_DEVICE,
76 }, {
77 .virtual = (unsigned long)S3C_VA_MEM,
78 .pfn = __phys_to_pfn(S3C64XX_PA_SROM),
79 .length = SZ_4K,
80 .type = MT_DEVICE,
81 }, {
82 .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS),
83 .pfn = __phys_to_pfn(S3C_PA_UART),
84 .length = SZ_4K,
85 .type = MT_DEVICE,
86 }, {
87 .virtual = (unsigned long)VA_VIC0,
88 .pfn = __phys_to_pfn(S3C64XX_PA_VIC0),
89 .length = SZ_16K,
90 .type = MT_DEVICE,
91 }, {
92 .virtual = (unsigned long)VA_VIC1,
93 .pfn = __phys_to_pfn(S3C64XX_PA_VIC1),
94 .length = SZ_16K,
95 .type = MT_DEVICE,
96 }, {
97 .virtual = (unsigned long)S3C_VA_TIMER,
98 .pfn = __phys_to_pfn(S3C_PA_TIMER),
99 .length = SZ_16K,
100 .type = MT_DEVICE,
101 }, {
102 .virtual = (unsigned long)S3C64XX_VA_GPIO,
103 .pfn = __phys_to_pfn(S3C64XX_PA_GPIO),
104 .length = SZ_4K,
105 .type = MT_DEVICE,
106 }, {
107 .virtual = (unsigned long)S3C64XX_VA_MODEM,
108 .pfn = __phys_to_pfn(S3C64XX_PA_MODEM),
109 .length = SZ_4K,
110 .type = MT_DEVICE,
111 }, {
112 .virtual = (unsigned long)S3C_VA_WATCHDOG,
113 .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG),
114 .length = SZ_4K,
115 .type = MT_DEVICE,
116 }, {
117 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
118 .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY),
119 .length = SZ_1K,
120 .type = MT_DEVICE,
121 },
122};
123
124
125struct sysdev_class s3c64xx_sysclass = {
126 .name = "s3c64xx-core",
127};
128
129static struct sys_device s3c64xx_sysdev = {
130 .cls = &s3c64xx_sysclass,
131};
132
133/* uart registration process */
134
135void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
136{
137 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
138}
139
140/* read cpu identification code */
141
142void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
143{
144 /* initialise the io descriptors we need for initialisation */
145 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
146 iotable_init(mach_desc, size);
147 init_consistent_dma_size(SZ_8M);
148
149 /* detect cpu id */
150 s3c64xx_init_cpu();
151
152 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
153}
154
155static __init int s3c64xx_sysdev_init(void)
156{
157 sysdev_class_register(&s3c64xx_sysclass);
158 return sysdev_register(&s3c64xx_sysdev);
159}
160
161core_initcall(s3c64xx_sysdev_init);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 00:58:57 -0500