diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 09:06:41 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 16:47:29 -0500 |
commit | a5209797450a7c95a9b546d83dae163833f16437 (patch) | |
tree | d012521167bcaee082aaf3ffd07d8239095ef473 /arch/arm/mach-s3c6400 | |
parent | d521f87e9c642dbc820cb839039e25a05cb02151 (diff) |
[ARM] S3C64XX: Add <mach/entry-macro.S>
Add the include for the interrupt entry macros needed
to be included by <mach/entry-macro.S> for the kernel
interrupt handler.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c6400')
-rw-r--r-- | arch/arm/mach-s3c6400/include/mach/entry-macro.S | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c6400/include/mach/entry-macro.S b/arch/arm/mach-s3c6400/include/mach/entry-macro.S new file mode 100644 index 000000000000..fbd90d2cf355 --- /dev/null +++ b/arch/arm/mach-s3c6400/include/mach/entry-macro.S | |||
@@ -0,0 +1,44 @@ | |||
1 | /* arch/arm/mach-s3c6400/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * Low-level IRQ helper macros for the Samsung S3C64XX series | ||
9 | * | ||
10 | * This file is licensed under the terms of the GNU General Public | ||
11 | * License version 2. This program is licensed "as is" without any | ||
12 | * warranty of any kind, whether express or implied. | ||
13 | */ | ||
14 | |||
15 | #include <asm/hardware/vic.h> | ||
16 | #include <mach/map.h> | ||
17 | #include <plat/irqs.h> | ||
18 | |||
19 | .macro disable_fiq | ||
20 | .endm | ||
21 | |||
22 | .macro get_irqnr_preamble, base, tmp | ||
23 | ldr \base, =S3C_VA_VIC0 | ||
24 | .endm | ||
25 | |||
26 | .macro arch_ret_to_user, tmp1, tmp2 | ||
27 | .endm | ||
28 | |||
29 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
30 | |||
31 | @ check the vic0 | ||
32 | mov \irqnr, # S3C_IRQ_OFFSET + 31 | ||
33 | ldr \irqstat, [ \base, # VIC_IRQ_STATUS ] | ||
34 | teq \irqstat, #0 | ||
35 | |||
36 | @ otherwise try vic1 | ||
37 | addeq \tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0) | ||
38 | addeq \irqnr, \irqnr, #32 | ||
39 | ldreq \irqstat, [ \tmp, # VIC_IRQ_STATUS ] | ||
40 | teqeq \irqstat, #0 | ||
41 | |||
42 | clzne \irqstat, \irqstat | ||
43 | subne \irqnr, \irqnr, \irqstat | ||
44 | .endm | ||