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authorHeiko Stuebner <heiko@sntech.de>2013-02-12 12:59:17 -0500
committerKukjin Kim <kgene.kim@samsung.com>2013-03-05 06:20:27 -0500
commit6f8d7ea275eb2a27fd62211e93921a82f367f939 (patch)
tree62638f7a9815d97a2398da5f2601df285b7a3dc4 /arch/arm/mach-s3c24xx
parentad38bdd15d5b97dcb1ffc46ea77c237e30312fbb (diff)
ARM: S3C24XX: move s3c244x irq init to common irq code
Base for further modifications. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx')
-rw-r--r--arch/arm/mach-s3c24xx/Makefile2
-rw-r--r--arch/arm/mach-s3c24xx/irq-s3c244x.c142
-rw-r--r--arch/arm/mach-s3c24xx/irq.c105
3 files changed, 106 insertions, 143 deletions
diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile
index af53d27d5c36..051b8f99d2fd 100644
--- a/arch/arm/mach-s3c24xx/Makefile
+++ b/arch/arm/mach-s3c24xx/Makefile
@@ -33,7 +33,7 @@ obj-$(CONFIG_S3C2416_PM) += pm-s3c2416.o
33 33
34obj-$(CONFIG_CPU_S3C2440) += s3c2440.o irq-s3c2440.o clock-s3c2440.o 34obj-$(CONFIG_CPU_S3C2440) += s3c2440.o irq-s3c2440.o clock-s3c2440.o
35obj-$(CONFIG_CPU_S3C2442) += s3c2442.o 35obj-$(CONFIG_CPU_S3C2442) += s3c2442.o
36obj-$(CONFIG_CPU_S3C244X) += s3c244x.o irq-s3c244x.o clock-s3c244x.o 36obj-$(CONFIG_CPU_S3C244X) += s3c244x.o clock-s3c244x.o
37obj-$(CONFIG_S3C2440_CPUFREQ) += cpufreq-s3c2440.o 37obj-$(CONFIG_S3C2440_CPUFREQ) += cpufreq-s3c2440.o
38obj-$(CONFIG_S3C2440_DMA) += dma-s3c2440.o 38obj-$(CONFIG_S3C2440_DMA) += dma-s3c2440.o
39obj-$(CONFIG_S3C2440_PLL_12000000) += pll-s3c2440-12000000.o 39obj-$(CONFIG_S3C2440_PLL_12000000) += pll-s3c2440-12000000.o
diff --git a/arch/arm/mach-s3c24xx/irq-s3c244x.c b/arch/arm/mach-s3c24xx/irq-s3c244x.c
deleted file mode 100644
index 5fe8e58d3afd..000000000000
--- a/arch/arm/mach-s3c24xx/irq-s3c244x.c
+++ /dev/null
@@ -1,142 +0,0 @@
1/* linux/arch/arm/plat-s3c24xx/s3c244x-irq.c
2 *
3 * Copyright (c) 2003-2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20*/
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/ioport.h>
26#include <linux/device.h>
27#include <linux/io.h>
28
29#include <mach/hardware.h>
30#include <asm/irq.h>
31
32#include <asm/mach/irq.h>
33
34#include <mach/regs-irq.h>
35#include <mach/regs-gpio.h>
36
37#include <plat/cpu.h>
38#include <plat/pm.h>
39#include <plat/irq.h>
40
41/* camera irq */
42
43static void s3c_irq_demux_cam(unsigned int irq,
44 struct irq_desc *desc)
45{
46 unsigned int subsrc, submsk;
47
48 /* read the current pending interrupts, and the mask
49 * for what it is available */
50
51 subsrc = __raw_readl(S3C2410_SUBSRCPND);
52 submsk = __raw_readl(S3C2410_INTSUBMSK);
53
54 subsrc &= ~submsk;
55 subsrc >>= 11;
56 subsrc &= 3;
57
58 if (subsrc != 0) {
59 if (subsrc & 1) {
60 generic_handle_irq(IRQ_S3C2440_CAM_C);
61 }
62 if (subsrc & 2) {
63 generic_handle_irq(IRQ_S3C2440_CAM_P);
64 }
65 }
66}
67
68#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
69
70static void
71s3c_irq_cam_mask(struct irq_data *data)
72{
73 s3c_irqsub_mask(data->irq, INTMSK_CAM, 3 << 11);
74}
75
76static void
77s3c_irq_cam_unmask(struct irq_data *data)
78{
79 s3c_irqsub_unmask(data->irq, INTMSK_CAM);
80}
81
82static void
83s3c_irq_cam_ack(struct irq_data *data)
84{
85 s3c_irqsub_maskack(data->irq, INTMSK_CAM, 3 << 11);
86}
87
88static struct irq_chip s3c_irq_cam = {
89 .irq_mask = s3c_irq_cam_mask,
90 .irq_unmask = s3c_irq_cam_unmask,
91 .irq_ack = s3c_irq_cam_ack,
92};
93
94static int s3c244x_irq_add(struct device *dev, struct subsys_interface *sif)
95{
96 unsigned int irqno;
97
98 irq_set_chip_and_handler(IRQ_NFCON, &s3c_irq_level_chip,
99 handle_level_irq);
100 set_irq_flags(IRQ_NFCON, IRQF_VALID);
101
102 /* add chained handler for camera */
103
104 irq_set_chip_and_handler(IRQ_CAM, &s3c_irq_level_chip,
105 handle_level_irq);
106 irq_set_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
107
108 for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
109 irq_set_chip_and_handler(irqno, &s3c_irq_cam,
110 handle_level_irq);
111 set_irq_flags(irqno, IRQF_VALID);
112 }
113
114 return 0;
115}
116
117static struct subsys_interface s3c2440_irq_interface = {
118 .name = "s3c2440_irq",
119 .subsys = &s3c2440_subsys,
120 .add_dev = s3c244x_irq_add,
121};
122
123static int s3c2440_irq_init(void)
124{
125 return subsys_interface_register(&s3c2440_irq_interface);
126}
127
128arch_initcall(s3c2440_irq_init);
129
130static struct subsys_interface s3c2442_irq_interface = {
131 .name = "s3c2442_irq",
132 .subsys = &s3c2442_subsys,
133 .add_dev = s3c244x_irq_add,
134};
135
136
137static int s3c2442_irq_init(void)
138{
139 return subsys_interface_register(&s3c2442_irq_interface);
140}
141
142arch_initcall(s3c2442_irq_init);
diff --git a/arch/arm/mach-s3c24xx/irq.c b/arch/arm/mach-s3c24xx/irq.c
index c1b96f7cc587..1fea3ddd123d 100644
--- a/arch/arm/mach-s3c24xx/irq.c
+++ b/arch/arm/mach-s3c24xx/irq.c
@@ -729,6 +729,111 @@ void __init s3c2416_init_irq(void)
729 729
730#endif 730#endif
731 731
732#ifdef CONFIG_CPU_S3C244X
733/* camera irq */
734
735static void s3c_irq_demux_cam(unsigned int irq,
736 struct irq_desc *desc)
737{
738 unsigned int subsrc, submsk;
739
740 /* read the current pending interrupts, and the mask
741 * for what it is available */
742
743 subsrc = __raw_readl(S3C2410_SUBSRCPND);
744 submsk = __raw_readl(S3C2410_INTSUBMSK);
745
746 subsrc &= ~submsk;
747 subsrc >>= 11;
748 subsrc &= 3;
749
750 if (subsrc != 0) {
751 if (subsrc & 1) {
752 generic_handle_irq(IRQ_S3C2440_CAM_C);
753 }
754 if (subsrc & 2) {
755 generic_handle_irq(IRQ_S3C2440_CAM_P);
756 }
757 }
758}
759
760#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
761
762static void
763s3c_irq_cam_mask(struct irq_data *data)
764{
765 s3c_irqsub_mask(data->irq, INTMSK_CAM, 3 << 11);
766}
767
768static void
769s3c_irq_cam_unmask(struct irq_data *data)
770{
771 s3c_irqsub_unmask(data->irq, INTMSK_CAM);
772}
773
774static void
775s3c_irq_cam_ack(struct irq_data *data)
776{
777 s3c_irqsub_maskack(data->irq, INTMSK_CAM, 3 << 11);
778}
779
780static struct irq_chip s3c_irq_cam = {
781 .irq_mask = s3c_irq_cam_mask,
782 .irq_unmask = s3c_irq_cam_unmask,
783 .irq_ack = s3c_irq_cam_ack,
784};
785
786static int s3c244x_irq_add(struct device *dev, struct subsys_interface *sif)
787{
788 unsigned int irqno;
789
790 irq_set_chip_and_handler(IRQ_NFCON, &s3c_irq_level_chip,
791 handle_level_irq);
792 set_irq_flags(IRQ_NFCON, IRQF_VALID);
793
794 /* add chained handler for camera */
795
796 irq_set_chip_and_handler(IRQ_CAM, &s3c_irq_level_chip,
797 handle_level_irq);
798 irq_set_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
799
800 for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
801 irq_set_chip_and_handler(irqno, &s3c_irq_cam,
802 handle_level_irq);
803 set_irq_flags(irqno, IRQF_VALID);
804 }
805
806 return 0;
807}
808
809static struct subsys_interface s3c2440_irq_interface = {
810 .name = "s3c2440_irq",
811 .subsys = &s3c2440_subsys,
812 .add_dev = s3c244x_irq_add,
813};
814
815static int s3c2440_irq_init(void)
816{
817 return subsys_interface_register(&s3c2440_irq_interface);
818}
819
820arch_initcall(s3c2440_irq_init);
821
822static struct subsys_interface s3c2442_irq_interface = {
823 .name = "s3c2442_irq",
824 .subsys = &s3c2442_subsys,
825 .add_dev = s3c244x_irq_add,
826};
827
828
829static int s3c2442_irq_init(void)
830{
831 return subsys_interface_register(&s3c2442_irq_interface);
832}
833
834arch_initcall(s3c2442_irq_init);
835#endif
836
732#ifdef CONFIG_CPU_S3C2443 837#ifdef CONFIG_CPU_S3C2443
733static struct s3c_irq_data init_s3c2443base[32] = { 838static struct s3c_irq_data init_s3c2443base[32] = {
734 { .type = S3C_IRQTYPE_EINT, }, /* EINT0 */ 839 { .type = S3C_IRQTYPE_EINT, }, /* EINT0 */