diff options
author | Heiko Stuebner <heiko@sntech.de> | 2012-05-12 03:22:18 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-05-12 03:22:18 -0400 |
commit | 2473f713ec78e477b9c97d122f9304ad9bc7d98a (patch) | |
tree | 971d053e26695d5b8f1cac15eee8805e4210bd37 /arch/arm/mach-s3c24xx | |
parent | de7bfff1b251395be9a229ee14191105d8d1385d (diff) |
ARM: S3C24XX: move common clock init into common.c
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx')
-rw-r--r-- | arch/arm/mach-s3c24xx/common.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c index 5e4ac347f01e..d42423aa231c 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c24xx/common.c | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <asm/mach/arch.h> | 41 | #include <asm/mach/arch.h> |
42 | #include <asm/mach/map.h> | 42 | #include <asm/mach/map.h> |
43 | 43 | ||
44 | #include <mach/regs-clock.h> | ||
44 | #include <mach/regs-gpio.h> | 45 | #include <mach/regs-gpio.h> |
45 | #include <plat/regs-serial.h> | 46 | #include <plat/regs-serial.h> |
46 | 47 | ||
@@ -52,6 +53,8 @@ | |||
52 | #include <plat/s3c2416.h> | 53 | #include <plat/s3c2416.h> |
53 | #include <plat/s3c244x.h> | 54 | #include <plat/s3c244x.h> |
54 | #include <plat/s3c2443.h> | 55 | #include <plat/s3c2443.h> |
56 | #include <plat/cpu-freq.h> | ||
57 | #include <plat/pll.h> | ||
55 | 58 | ||
56 | /* table of supported CPUs */ | 59 | /* table of supported CPUs */ |
57 | 60 | ||
@@ -307,3 +310,18 @@ struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = { | |||
307 | .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource), | 310 | .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource), |
308 | }, | 311 | }, |
309 | }; | 312 | }; |
313 | |||
314 | /* initialise all the clocks */ | ||
315 | |||
316 | void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk, | ||
317 | unsigned long hclk, | ||
318 | unsigned long pclk) | ||
319 | { | ||
320 | clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON), | ||
321 | clk_xtal.rate); | ||
322 | |||
323 | clk_mpll.rate = fclk; | ||
324 | clk_h.rate = hclk; | ||
325 | clk_p.rate = pclk; | ||
326 | clk_f.rate = fclk; | ||
327 | } | ||