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authorTakashi Iwai <tiwai@suse.de>2013-04-18 10:24:31 -0400
committerTakashi Iwai <tiwai@suse.de>2013-04-18 10:24:31 -0400
commit8dd2b66d1a961231685a3bfe5937c85d846fbf5d (patch)
tree8117553488bf4ef09b048a4b343cf37cc16bf46d /arch/arm/mach-s3c24xx
parent126825e7ea271ae8e3172e10ca1fc22c908b5385 (diff)
parent24568ea4bef5ab8106206eddf5512434421c00ed (diff)
Merge tag 'asoc-v3.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: More updates for v3.10 The main additional change here is Lars-Peter's DMA work plus the platform conversions which have been tested - getting this in mainline will make life easier for development after the merge window. These factor a large chunk of code out of the drivers for the platforms using dmaengine, greatly simplifying development.
Diffstat (limited to 'arch/arm/mach-s3c24xx')
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-s3c24xx/irq.c2
2 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mach-s3c24xx/include/mach/irqs.h b/arch/arm/mach-s3c24xx/include/mach/irqs.h
index b7a9f4d469e8..1e73f5fa8659 100644
--- a/arch/arm/mach-s3c24xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c24xx/include/mach/irqs.h
@@ -188,10 +188,8 @@
188 188
189#if defined(CONFIG_CPU_S3C2416) 189#if defined(CONFIG_CPU_S3C2416)
190#define NR_IRQS (IRQ_S3C2416_I2S1 + 1) 190#define NR_IRQS (IRQ_S3C2416_I2S1 + 1)
191#elif defined(CONFIG_CPU_S3C2443)
192#define NR_IRQS (IRQ_S3C2443_AC97+1)
193#else 191#else
194#define NR_IRQS (IRQ_S3C2440_AC97+1) 192#define NR_IRQS (IRQ_S3C2443_AC97 + 1)
195#endif 193#endif
196 194
197/* compatibility define. */ 195/* compatibility define. */
diff --git a/arch/arm/mach-s3c24xx/irq.c b/arch/arm/mach-s3c24xx/irq.c
index cb9f5e011e73..d8ba9bee4c7e 100644
--- a/arch/arm/mach-s3c24xx/irq.c
+++ b/arch/arm/mach-s3c24xx/irq.c
@@ -500,7 +500,7 @@ struct s3c_irq_intc *s3c24xx_init_intc(struct device_node *np,
500 base = (void *)0xfd000000; 500 base = (void *)0xfd000000;
501 501
502 intc->reg_mask = base + 0xa4; 502 intc->reg_mask = base + 0xa4;
503 intc->reg_pending = base + 0x08; 503 intc->reg_pending = base + 0xa8;
504 irq_num = 20; 504 irq_num = 20;
505 irq_start = S3C2410_IRQ(32); 505 irq_start = S3C2410_IRQ(32);
506 irq_offset = 4; 506 irq_offset = 4;