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authorKukjin Kim <kgene.kim@samsung.com>2013-01-21 18:16:35 -0500
committerKukjin Kim <kgene.kim@samsung.com>2013-01-21 20:03:32 -0500
commit82c1871245fc6626a0e2f127b4fd202698541c40 (patch)
tree351d2162f6ce3f40e7a7097317f81bfe03526e99 /arch/arm/mach-s3c24xx/pll-s3c2410.c
parent98713e401f5cfc2a6c7cdea71b8b71c462a195ce (diff)
ARM: S3C24XX: Move mach-s3c2410/ pll into mach-s3c24xx/
This patch moves mach-s3c2410/pll into mach-s3c24xx/ and removes arch/arm/mach-s3c2410/ directory in kernel. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/pll-s3c2410.c')
-rw-r--r--arch/arm/mach-s3c24xx/pll-s3c2410.c96
1 files changed, 96 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c24xx/pll-s3c2410.c b/arch/arm/mach-s3c24xx/pll-s3c2410.c
new file mode 100644
index 000000000000..dcf3420a3271
--- /dev/null
+++ b/arch/arm/mach-s3c24xx/pll-s3c2410.c
@@ -0,0 +1,96 @@
1/*
2 * Copyright (c) 2006-2007 Simtec Electronics
3 * http://armlinux.simtec.co.uk/
4 * Ben Dooks <ben@simtec.co.uk>
5 * Vincent Sanders <vince@arm.linux.org.uk>
6 *
7 * S3C2410 CPU PLL tables
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*/
23
24#include <linux/types.h>
25#include <linux/kernel.h>
26#include <linux/module.h>
27#include <linux/device.h>
28#include <linux/list.h>
29#include <linux/clk.h>
30#include <linux/err.h>
31
32#include <plat/cpu.h>
33#include <plat/cpu-freq-core.h>
34
35static struct cpufreq_frequency_table pll_vals_12MHz[] = {
36 { .frequency = 34000000, .index = PLLVAL(82, 2, 3), },
37 { .frequency = 45000000, .index = PLLVAL(82, 1, 3), },
38 { .frequency = 51000000, .index = PLLVAL(161, 3, 3), },
39 { .frequency = 48000000, .index = PLLVAL(120, 2, 3), },
40 { .frequency = 56000000, .index = PLLVAL(142, 2, 3), },
41 { .frequency = 68000000, .index = PLLVAL(82, 2, 2), },
42 { .frequency = 79000000, .index = PLLVAL(71, 1, 2), },
43 { .frequency = 85000000, .index = PLLVAL(105, 2, 2), },
44 { .frequency = 90000000, .index = PLLVAL(112, 2, 2), },
45 { .frequency = 101000000, .index = PLLVAL(127, 2, 2), },
46 { .frequency = 113000000, .index = PLLVAL(105, 1, 2), },
47 { .frequency = 118000000, .index = PLLVAL(150, 2, 2), },
48 { .frequency = 124000000, .index = PLLVAL(116, 1, 2), },
49 { .frequency = 135000000, .index = PLLVAL(82, 2, 1), },
50 { .frequency = 147000000, .index = PLLVAL(90, 2, 1), },
51 { .frequency = 152000000, .index = PLLVAL(68, 1, 1), },
52 { .frequency = 158000000, .index = PLLVAL(71, 1, 1), },
53 { .frequency = 170000000, .index = PLLVAL(77, 1, 1), },
54 { .frequency = 180000000, .index = PLLVAL(82, 1, 1), },
55 { .frequency = 186000000, .index = PLLVAL(85, 1, 1), },
56 { .frequency = 192000000, .index = PLLVAL(88, 1, 1), },
57 { .frequency = 203000000, .index = PLLVAL(161, 3, 1), },
58
59 /* 2410A extras */
60
61 { .frequency = 210000000, .index = PLLVAL(132, 2, 1), },
62 { .frequency = 226000000, .index = PLLVAL(105, 1, 1), },
63 { .frequency = 266000000, .index = PLLVAL(125, 1, 1), },
64 { .frequency = 268000000, .index = PLLVAL(126, 1, 1), },
65 { .frequency = 270000000, .index = PLLVAL(127, 1, 1), },
66};
67
68static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif)
69{
70 return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz));
71}
72
73static struct subsys_interface s3c2410_plls_interface = {
74 .name = "s3c2410_plls",
75 .subsys = &s3c2410_subsys,
76 .add_dev = s3c2410_plls_add,
77};
78
79static int __init s3c2410_pll_init(void)
80{
81 return subsys_interface_register(&s3c2410_plls_interface);
82
83}
84arch_initcall(s3c2410_pll_init);
85
86static struct subsys_interface s3c2410a_plls_interface = {
87 .name = "s3c2410a_plls",
88 .subsys = &s3c2410a_subsys,
89 .add_dev = s3c2410_plls_add,
90};
91
92static int __init s3c2410a_pll_init(void)
93{
94 return subsys_interface_register(&s3c2410a_plls_interface);
95}
96arch_initcall(s3c2410a_pll_init);