diff options
author | Heiko Stuebner <heiko@sntech.de> | 2013-03-06 22:38:16 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2013-03-06 22:38:16 -0500 |
commit | 0fe3cb1ea5bf382cec946328ee25b233cab45c4d (patch) | |
tree | 675a1f6a929ffac154d507a21431211b728de47b /arch/arm/mach-s3c24xx/irq.c | |
parent | 502a29890cb10292f464beb802f7184c0d567ab8 (diff) |
ARM: S3C24XX: fix irq parent check
The current parent_irq check checks for a value != 0. This does of course
not work when the parent irq sits in the bit 0 of the parent register.
This only affects the eint0 interrupt of the s3c2412.
To fix this behaviour, check for the presence of a parent_intc in the
structure. In an s3c24xx interrupt controller either all interrupts have
parent interrupts or none have, so if a parent controller is available
the parent_irq value always points to a parent_irq.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/irq.c')
-rw-r--r-- | arch/arm/mach-s3c24xx/irq.c | 22 |
1 files changed, 8 insertions, 14 deletions
diff --git a/arch/arm/mach-s3c24xx/irq.c b/arch/arm/mach-s3c24xx/irq.c index 5257c9fd9e04..a6a7554d946e 100644 --- a/arch/arm/mach-s3c24xx/irq.c +++ b/arch/arm/mach-s3c24xx/irq.c | |||
@@ -81,7 +81,7 @@ static void s3c_irq_mask(struct irq_data *data) | |||
81 | mask |= (1UL << data->hwirq); | 81 | mask |= (1UL << data->hwirq); |
82 | __raw_writel(mask, intc->reg_mask); | 82 | __raw_writel(mask, intc->reg_mask); |
83 | 83 | ||
84 | if (parent_intc && irq_data->parent_irq) { | 84 | if (parent_intc) { |
85 | parent_data = &parent_intc->irqs[irq_data->parent_irq]; | 85 | parent_data = &parent_intc->irqs[irq_data->parent_irq]; |
86 | 86 | ||
87 | /* check to see if we need to mask the parent IRQ */ | 87 | /* check to see if we need to mask the parent IRQ */ |
@@ -105,7 +105,7 @@ static void s3c_irq_unmask(struct irq_data *data) | |||
105 | mask &= ~(1UL << data->hwirq); | 105 | mask &= ~(1UL << data->hwirq); |
106 | __raw_writel(mask, intc->reg_mask); | 106 | __raw_writel(mask, intc->reg_mask); |
107 | 107 | ||
108 | if (parent_intc && irq_data->parent_irq) { | 108 | if (parent_intc) { |
109 | irqno = irq_find_mapping(parent_intc->domain, | 109 | irqno = irq_find_mapping(parent_intc->domain, |
110 | irq_data->parent_irq); | 110 | irq_data->parent_irq); |
111 | s3c_irq_unmask(irq_get_irq_data(irqno)); | 111 | s3c_irq_unmask(irq_get_irq_data(irqno)); |
@@ -327,6 +327,8 @@ static int s3c24xx_irq_map(struct irq_domain *h, unsigned int virq, | |||
327 | /* attach controller pointer to irq_data */ | 327 | /* attach controller pointer to irq_data */ |
328 | irq_data->intc = intc; | 328 | irq_data->intc = intc; |
329 | 329 | ||
330 | parent_intc = intc->parent; | ||
331 | |||
330 | /* set handler and flags */ | 332 | /* set handler and flags */ |
331 | switch (irq_data->type) { | 333 | switch (irq_data->type) { |
332 | case S3C_IRQTYPE_NONE: | 334 | case S3C_IRQTYPE_NONE: |
@@ -335,7 +337,7 @@ static int s3c24xx_irq_map(struct irq_domain *h, unsigned int virq, | |||
335 | /* On the S3C2412, the EINT0to3 have a parent irq | 337 | /* On the S3C2412, the EINT0to3 have a parent irq |
336 | * but need the s3c_irq_eint0t4 chip | 338 | * but need the s3c_irq_eint0t4 chip |
337 | */ | 339 | */ |
338 | if (irq_data->parent_irq && (!soc_is_s3c2412() || hw >= 4)) | 340 | if (parent_intc && (!soc_is_s3c2412() || hw >= 4)) |
339 | irq_set_chip_and_handler(virq, &s3c_irqext_chip, | 341 | irq_set_chip_and_handler(virq, &s3c_irqext_chip, |
340 | handle_edge_irq); | 342 | handle_edge_irq); |
341 | else | 343 | else |
@@ -343,8 +345,7 @@ static int s3c24xx_irq_map(struct irq_domain *h, unsigned int virq, | |||
343 | handle_edge_irq); | 345 | handle_edge_irq); |
344 | break; | 346 | break; |
345 | case S3C_IRQTYPE_EDGE: | 347 | case S3C_IRQTYPE_EDGE: |
346 | if (irq_data->parent_irq || | 348 | if (parent_intc || intc->reg_pending == S3C2416_SRCPND2) |
347 | intc->reg_pending == S3C2416_SRCPND2) | ||
348 | irq_set_chip_and_handler(virq, &s3c_irq_level_chip, | 349 | irq_set_chip_and_handler(virq, &s3c_irq_level_chip, |
349 | handle_edge_irq); | 350 | handle_edge_irq); |
350 | else | 351 | else |
@@ -352,7 +353,7 @@ static int s3c24xx_irq_map(struct irq_domain *h, unsigned int virq, | |||
352 | handle_edge_irq); | 353 | handle_edge_irq); |
353 | break; | 354 | break; |
354 | case S3C_IRQTYPE_LEVEL: | 355 | case S3C_IRQTYPE_LEVEL: |
355 | if (irq_data->parent_irq) | 356 | if (parent_intc) |
356 | irq_set_chip_and_handler(virq, &s3c_irq_level_chip, | 357 | irq_set_chip_and_handler(virq, &s3c_irq_level_chip, |
357 | handle_level_irq); | 358 | handle_level_irq); |
358 | else | 359 | else |
@@ -365,14 +366,7 @@ static int s3c24xx_irq_map(struct irq_domain *h, unsigned int virq, | |||
365 | } | 366 | } |
366 | set_irq_flags(virq, IRQF_VALID); | 367 | set_irq_flags(virq, IRQF_VALID); |
367 | 368 | ||
368 | if (irq_data->parent_irq) { | 369 | if (parent_intc && irq_data->type != S3C_IRQTYPE_NONE) { |
369 | parent_intc = intc->parent; | ||
370 | if (!parent_intc) { | ||
371 | pr_err("irq-s3c24xx: no parent controller found for hwirq %lu\n", | ||
372 | hw); | ||
373 | goto err; | ||
374 | } | ||
375 | |||
376 | if (irq_data->parent_irq > 31) { | 370 | if (irq_data->parent_irq > 31) { |
377 | pr_err("irq-s3c24xx: parent irq %lu is out of range\n", | 371 | pr_err("irq-s3c24xx: parent irq %lu is out of range\n", |
378 | irq_data->parent_irq); | 372 | irq_data->parent_irq); |