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authorHeiko Stuebner <heiko@sntech.de>2012-03-07 05:00:05 -0500
committerKukjin Kim <kgene.kim@samsung.com>2012-03-07 05:00:05 -0500
commit2e5ac9436645bb9fd2097868e228321f303c9c75 (patch)
tree716f176f5299c6cd98382d429fefa4f516f5d48e /arch/arm/mach-s3c24xx/common-s3c2443.c
parent9edc12a1a9db50fd7659463adf5a0e1eb5f2ce0d (diff)
ARM: S3C24XX: remove call to s3c24xx_setup_clocks
As the clocks can calculate their rate themself now, there is no need to set it statically. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/common-s3c2443.c')
-rw-r--r--arch/arm/mach-s3c24xx/common-s3c2443.c15
1 files changed, 4 insertions, 11 deletions
diff --git a/arch/arm/mach-s3c24xx/common-s3c2443.c b/arch/arm/mach-s3c24xx/common-s3c2443.c
index 46795db2af41..7414890e6ee8 100644
--- a/arch/arm/mach-s3c24xx/common-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/common-s3c2443.c
@@ -571,9 +571,6 @@ void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll)
571 struct clk *xtal_clk; 571 struct clk *xtal_clk;
572 unsigned long xtal; 572 unsigned long xtal;
573 unsigned long pll; 573 unsigned long pll;
574 unsigned long fclk;
575 unsigned long hclk;
576 unsigned long pclk;
577 int ptr; 574 int ptr;
578 575
579 xtal_clk = clk_get(NULL, "xtal"); 576 xtal_clk = clk_get(NULL, "xtal");
@@ -582,17 +579,13 @@ void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll)
582 579
583 pll = get_mpll(mpllcon, xtal); 580 pll = get_mpll(mpllcon, xtal);
584 clk_msysclk.clk.rate = pll; 581 clk_msysclk.clk.rate = pll;
585 582 clk_mpll.rate = pll;
586 fclk = clk_get_rate(&clk_armdiv);
587 hclk = clk_get_rate(&clk_h);
588 pclk = clk_get_rate(&clk_p);
589
590 s3c24xx_setup_clocks(fclk, hclk, pclk);
591 583
592 printk("CPU: MPLL %s %ld.%03ld MHz, cpu %ld.%03ld MHz, mem %ld.%03ld MHz, pclk %ld.%03ld MHz\n", 584 printk("CPU: MPLL %s %ld.%03ld MHz, cpu %ld.%03ld MHz, mem %ld.%03ld MHz, pclk %ld.%03ld MHz\n",
593 (mpllcon & S3C2443_PLLCON_OFF) ? "off" : "on", 585 (mpllcon & S3C2443_PLLCON_OFF) ? "off" : "on",
594 print_mhz(pll), print_mhz(fclk), 586 print_mhz(pll), print_mhz(clk_get_rate(&clk_armdiv)),
595 print_mhz(hclk), print_mhz(pclk)); 587 print_mhz(clk_get_rate(&clk_h)),
588 print_mhz(clk_get_rate(&clk_p)));
596 589
597 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++) 590 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++)
598 s3c_set_clksrc(&clksrc_clks[ptr], true); 591 s3c_set_clksrc(&clksrc_clks[ptr], true);