diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2011-10-04 07:18:36 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-10-04 07:18:36 -0400 |
commit | db3c94a7edc6b29f8d52ba5884dec6a15feeadad (patch) | |
tree | ac9207a44cecafb9104ca4e1f46aecb9fe01383d /arch/arm/mach-s3c2443 | |
parent | c9477f38cba225870862fd9e08868ae3d4abdfe0 (diff) | |
parent | 568f0e278c6dd33dc11bd19c4ad781d1f8d86800 (diff) |
Merge branch 'next-samsung-devel' into next-samsung-devel-2
Conflicts:
arch/arm/mach-exynos4/clock.c
arch/arm/mach-s3c2412/gpio.c
arch/arm/mach-s5p64x0/dma.c
arch/arm/mach-s5p64x0/gpiolib.c
Diffstat (limited to 'arch/arm/mach-s3c2443')
-rw-r--r-- | arch/arm/mach-s3c2443/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-s3c2443/clock.c | 55 | ||||
-rw-r--r-- | arch/arm/mach-s3c2443/s3c2443.c | 4 |
3 files changed, 3 insertions, 57 deletions
diff --git a/arch/arm/mach-s3c2443/Kconfig b/arch/arm/mach-s3c2443/Kconfig index d8eb86823df7..8814031516ce 100644 --- a/arch/arm/mach-s3c2443/Kconfig +++ b/arch/arm/mach-s3c2443/Kconfig | |||
@@ -10,7 +10,6 @@ config CPU_S3C2443 | |||
10 | select CPU_LLSERIAL_S3C2440 | 10 | select CPU_LLSERIAL_S3C2440 |
11 | select SAMSUNG_CLKSRC | 11 | select SAMSUNG_CLKSRC |
12 | select S3C2443_CLOCK | 12 | select S3C2443_CLOCK |
13 | select S3C_GPIO_PULL_S3C2443 | ||
14 | help | 13 | help |
15 | Support for the S3C2443 SoC from the S3C24XX line | 14 | Support for the S3C2443 SoC from the S3C24XX line |
16 | 15 | ||
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c index 38058af48972..cd51d04e1de7 100644 --- a/arch/arm/mach-s3c2443/clock.c +++ b/arch/arm/mach-s3c2443/clock.c | |||
@@ -57,10 +57,6 @@ | |||
57 | 57 | ||
58 | /* clock selections */ | 58 | /* clock selections */ |
59 | 59 | ||
60 | static struct clk clk_i2s_ext = { | ||
61 | .name = "i2s-ext", | ||
62 | }; | ||
63 | |||
64 | /* armdiv | 60 | /* armdiv |
65 | * | 61 | * |
66 | * this clock is sourced from msysclk and can have a number of | 62 | * this clock is sourced from msysclk and can have a number of |
@@ -173,7 +169,7 @@ static struct clksrc_clk clk_arm = { | |||
173 | 169 | ||
174 | static struct clksrc_clk clk_hsspi = { | 170 | static struct clksrc_clk clk_hsspi = { |
175 | .clk = { | 171 | .clk = { |
176 | .name = "hsspi", | 172 | .name = "hsspi-if", |
177 | .parent = &clk_esysclk.clk, | 173 | .parent = &clk_esysclk.clk, |
178 | .ctrlbit = S3C2443_SCLKCON_HSSPICLK, | 174 | .ctrlbit = S3C2443_SCLKCON_HSSPICLK, |
179 | .enable = s3c2443_clkcon_enable_s, | 175 | .enable = s3c2443_clkcon_enable_s, |
@@ -235,48 +231,6 @@ static struct clk clk_hsmmc = { | |||
235 | }, | 231 | }, |
236 | }; | 232 | }; |
237 | 233 | ||
238 | /* i2s_eplldiv | ||
239 | * | ||
240 | * This clock is the output from the I2S divisor of ESYSCLK, and is separate | ||
241 | * from the mux that comes after it (cannot merge into one single clock) | ||
242 | */ | ||
243 | |||
244 | static struct clksrc_clk clk_i2s_eplldiv = { | ||
245 | .clk = { | ||
246 | .name = "i2s-eplldiv", | ||
247 | .parent = &clk_esysclk.clk, | ||
248 | }, | ||
249 | .reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, }, | ||
250 | }; | ||
251 | |||
252 | /* i2s-ref | ||
253 | * | ||
254 | * i2s bus reference clock, selectable from external, esysclk or epllref | ||
255 | * | ||
256 | * Note, this used to be two clocks, but was compressed into one. | ||
257 | */ | ||
258 | |||
259 | struct clk *clk_i2s_srclist[] = { | ||
260 | [0] = &clk_i2s_eplldiv.clk, | ||
261 | [1] = &clk_i2s_ext, | ||
262 | [2] = &clk_epllref.clk, | ||
263 | [3] = &clk_epllref.clk, | ||
264 | }; | ||
265 | |||
266 | static struct clksrc_clk clk_i2s = { | ||
267 | .clk = { | ||
268 | .name = "i2s-if", | ||
269 | .ctrlbit = S3C2443_SCLKCON_I2SCLK, | ||
270 | .enable = s3c2443_clkcon_enable_s, | ||
271 | |||
272 | }, | ||
273 | .sources = &(struct clksrc_sources) { | ||
274 | .sources = clk_i2s_srclist, | ||
275 | .nr_sources = ARRAY_SIZE(clk_i2s_srclist), | ||
276 | }, | ||
277 | .reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 }, | ||
278 | }; | ||
279 | |||
280 | /* standard clock definitions */ | 234 | /* standard clock definitions */ |
281 | 235 | ||
282 | static struct clk init_clocks_off[] = { | 236 | static struct clk init_clocks_off[] = { |
@@ -286,11 +240,6 @@ static struct clk init_clocks_off[] = { | |||
286 | .enable = s3c2443_clkcon_enable_p, | 240 | .enable = s3c2443_clkcon_enable_p, |
287 | .ctrlbit = S3C2443_PCLKCON_SDI, | 241 | .ctrlbit = S3C2443_PCLKCON_SDI, |
288 | }, { | 242 | }, { |
289 | .name = "iis", | ||
290 | .parent = &clk_p, | ||
291 | .enable = s3c2443_clkcon_enable_p, | ||
292 | .ctrlbit = S3C2443_PCLKCON_IIS, | ||
293 | }, { | ||
294 | .name = "spi", | 243 | .name = "spi", |
295 | .devname = "s3c2410-spi.0", | 244 | .devname = "s3c2410-spi.0", |
296 | .parent = &clk_p, | 245 | .parent = &clk_p, |
@@ -312,8 +261,6 @@ static struct clk init_clocks[] = { | |||
312 | 261 | ||
313 | static struct clksrc_clk *clksrcs[] __initdata = { | 262 | static struct clksrc_clk *clksrcs[] __initdata = { |
314 | &clk_arm, | 263 | &clk_arm, |
315 | &clk_i2s_eplldiv, | ||
316 | &clk_i2s, | ||
317 | &clk_hsspi, | 264 | &clk_hsspi, |
318 | &clk_hsmmc_div, | 265 | &clk_hsmmc_div, |
319 | }; | 266 | }; |
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c index e6a28ba52c7d..5df6458ddd42 100644 --- a/arch/arm/mach-s3c2443/s3c2443.c +++ b/arch/arm/mach-s3c2443/s3c2443.c | |||
@@ -90,8 +90,8 @@ void __init s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |||
90 | 90 | ||
91 | void __init s3c2443_map_io(void) | 91 | void __init s3c2443_map_io(void) |
92 | { | 92 | { |
93 | s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_s3c2443; | 93 | s3c24xx_gpiocfg_default.set_pull = s3c2443_gpio_setpull; |
94 | s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_s3c2443; | 94 | s3c24xx_gpiocfg_default.get_pull = s3c2443_gpio_getpull; |
95 | 95 | ||
96 | iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc)); | 96 | iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc)); |
97 | } | 97 | } |