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authorHeiko Stuebner <heiko@sntech.de>2011-08-18 07:16:56 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-09-16 02:39:43 -0400
commitead841c2ed986f7cc6a4830e816b0f633f95cf7f (patch)
tree867230bdc459dea547c2ceb39fba6c72ad737481 /arch/arm/mach-s3c2443
parent93ee7a9340d64f20295aacc3fb6a22b759323280 (diff)
ARM: S3C24XX: Remove hw_addr from s3c24xx dma channel declarations
According to commit c4806174c516d26bf4a72db1789cfc96e4950d07 (ARM: S3C2412: DMA: Remove I2S FIFO address) the S3C DMA API does not make use of hw_addr.to/from declared for some of the channels in mach-s3c24XX/dma.c Grepping through the kernel also did non reveal any new users of these properties since the mentioned commit. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c2443')
-rw-r--r--arch/arm/mach-s3c2443/dma.c27
1 files changed, 0 insertions, 27 deletions
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index 3f658685ec16..fe52151d2e84 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -54,68 +54,46 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = {
54 [DMACH_SDI] = { 54 [DMACH_SDI] = {
55 .name = "sdi", 55 .name = "sdi",
56 .channels = MAP(S3C2443_DMAREQSEL_SDI), 56 .channels = MAP(S3C2443_DMAREQSEL_SDI),
57 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
58 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
59 }, 57 },
60 [DMACH_SPI0] = { 58 [DMACH_SPI0] = {
61 .name = "spi0", 59 .name = "spi0",
62 .channels = MAP(S3C2443_DMAREQSEL_SPI0TX), 60 .channels = MAP(S3C2443_DMAREQSEL_SPI0TX),
63 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
64 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
65 }, 61 },
66 [DMACH_SPI1] = { 62 [DMACH_SPI1] = {
67 .name = "spi1", 63 .name = "spi1",
68 .channels = MAP(S3C2443_DMAREQSEL_SPI1TX), 64 .channels = MAP(S3C2443_DMAREQSEL_SPI1TX),
69 .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
70 .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
71 }, 65 },
72 [DMACH_UART0] = { 66 [DMACH_UART0] = {
73 .name = "uart0", 67 .name = "uart0",
74 .channels = MAP(S3C2443_DMAREQSEL_UART0_0), 68 .channels = MAP(S3C2443_DMAREQSEL_UART0_0),
75 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
76 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
77 }, 69 },
78 [DMACH_UART1] = { 70 [DMACH_UART1] = {
79 .name = "uart1", 71 .name = "uart1",
80 .channels = MAP(S3C2443_DMAREQSEL_UART1_0), 72 .channels = MAP(S3C2443_DMAREQSEL_UART1_0),
81 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
82 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
83 }, 73 },
84 [DMACH_UART2] = { 74 [DMACH_UART2] = {
85 .name = "uart2", 75 .name = "uart2",
86 .channels = MAP(S3C2443_DMAREQSEL_UART2_0), 76 .channels = MAP(S3C2443_DMAREQSEL_UART2_0),
87 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
88 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
89 }, 77 },
90 [DMACH_UART3] = { 78 [DMACH_UART3] = {
91 .name = "uart3", 79 .name = "uart3",
92 .channels = MAP(S3C2443_DMAREQSEL_UART3_0), 80 .channels = MAP(S3C2443_DMAREQSEL_UART3_0),
93 .hw_addr.to = S3C2443_PA_UART3 + S3C2410_UTXH,
94 .hw_addr.from = S3C2443_PA_UART3 + S3C2410_URXH,
95 }, 81 },
96 [DMACH_UART0_SRC2] = { 82 [DMACH_UART0_SRC2] = {
97 .name = "uart0", 83 .name = "uart0",
98 .channels = MAP(S3C2443_DMAREQSEL_UART0_1), 84 .channels = MAP(S3C2443_DMAREQSEL_UART0_1),
99 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
100 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
101 }, 85 },
102 [DMACH_UART1_SRC2] = { 86 [DMACH_UART1_SRC2] = {
103 .name = "uart1", 87 .name = "uart1",
104 .channels = MAP(S3C2443_DMAREQSEL_UART1_1), 88 .channels = MAP(S3C2443_DMAREQSEL_UART1_1),
105 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
106 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
107 }, 89 },
108 [DMACH_UART2_SRC2] = { 90 [DMACH_UART2_SRC2] = {
109 .name = "uart2", 91 .name = "uart2",
110 .channels = MAP(S3C2443_DMAREQSEL_UART2_1), 92 .channels = MAP(S3C2443_DMAREQSEL_UART2_1),
111 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
112 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
113 }, 93 },
114 [DMACH_UART3_SRC2] = { 94 [DMACH_UART3_SRC2] = {
115 .name = "uart3", 95 .name = "uart3",
116 .channels = MAP(S3C2443_DMAREQSEL_UART3_1), 96 .channels = MAP(S3C2443_DMAREQSEL_UART3_1),
117 .hw_addr.to = S3C2443_PA_UART3 + S3C2410_UTXH,
118 .hw_addr.from = S3C2443_PA_UART3 + S3C2410_URXH,
119 }, 97 },
120 [DMACH_TIMER] = { 98 [DMACH_TIMER] = {
121 .name = "timer", 99 .name = "timer",
@@ -124,27 +102,22 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = {
124 [DMACH_I2S_IN] = { 102 [DMACH_I2S_IN] = {
125 .name = "i2s-sdi", 103 .name = "i2s-sdi",
126 .channels = MAP(S3C2443_DMAREQSEL_I2SRX), 104 .channels = MAP(S3C2443_DMAREQSEL_I2SRX),
127 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
128 }, 105 },
129 [DMACH_I2S_OUT] = { 106 [DMACH_I2S_OUT] = {
130 .name = "i2s-sdo", 107 .name = "i2s-sdo",
131 .channels = MAP(S3C2443_DMAREQSEL_I2STX), 108 .channels = MAP(S3C2443_DMAREQSEL_I2STX),
132 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
133 }, 109 },
134 [DMACH_PCM_IN] = { 110 [DMACH_PCM_IN] = {
135 .name = "pcm-in", 111 .name = "pcm-in",
136 .channels = MAP(S3C2443_DMAREQSEL_PCMIN), 112 .channels = MAP(S3C2443_DMAREQSEL_PCMIN),
137 .hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
138 }, 113 },
139 [DMACH_PCM_OUT] = { 114 [DMACH_PCM_OUT] = {
140 .name = "pcm-out", 115 .name = "pcm-out",
141 .channels = MAP(S3C2443_DMAREQSEL_PCMOUT), 116 .channels = MAP(S3C2443_DMAREQSEL_PCMOUT),
142 .hw_addr.to = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
143 }, 117 },
144 [DMACH_MIC_IN] = { 118 [DMACH_MIC_IN] = {
145 .name = "mic-in", 119 .name = "mic-in",
146 .channels = MAP(S3C2443_DMAREQSEL_MICIN), 120 .channels = MAP(S3C2443_DMAREQSEL_MICIN),
147 .hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_MIC_DATA,
148 }, 121 },
149}; 122};
150 123