aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-s3c2443/irq.c
diff options
context:
space:
mode:
authorBen Dooks <ben-linux@fluff.org>2007-02-16 06:12:31 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-16 06:13:37 -0500
commite4d06e39530559513c7e335ef7ca4675f8146220 (patch)
treecfc65d49f873626c6be087d1a4411f6b48bec3c5 /arch/arm/mach-s3c2443/irq.c
parent17908ed715e63a02484838b5456fb3fdbd1dfed6 (diff)
[ARM] 4198/2: S3C2443: arch/arm/mach-s3c2443 and related support
Add arch/arm/mach-s3c2443 for support of the Samsung S3C2443 SoC This patch adds the core CPU support, clock framework, times and initial IRQ support, as well as adding the directory into the build tree. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2443/irq.c')
-rw-r--r--arch/arm/mach-s3c2443/irq.c130
1 files changed, 130 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2443/irq.c b/arch/arm/mach-s3c2443/irq.c
new file mode 100644
index 000000000000..f7058823a0e1
--- /dev/null
+++ b/arch/arm/mach-s3c2443/irq.c
@@ -0,0 +1,130 @@
1/* linux/arch/arm/mach-s3c2443/irq.c
2 *
3 * Copyright (c) 2007 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20*/
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/ioport.h>
26#include <linux/ptrace.h>
27#include <linux/sysdev.h>
28
29#include <asm/hardware.h>
30#include <asm/irq.h>
31#include <asm/io.h>
32
33#include <asm/mach/irq.h>
34
35#include <asm/arch/regs-irq.h>
36#include <asm/arch/regs-gpio.h>
37
38#include <asm/plat-s3c24xx/cpu.h>
39#include <asm/plat-s3c24xx/pm.h>
40#include <asm/plat-s3c24xx/irq.h>
41
42/* WDT/AC97 */
43
44static void s3c_irq_demux_wdtac97(unsigned int irq,
45 struct irq_desc *desc)
46{
47 unsigned int subsrc, submsk;
48 struct irq_desc *mydesc;
49
50 /* read the current pending interrupts, and the mask
51 * for what it is available */
52
53 subsrc = __raw_readl(S3C2410_SUBSRCPND);
54 submsk = __raw_readl(S3C2410_INTSUBMSK);
55
56 subsrc &= ~submsk;
57 subsrc >>= 27;
58 subsrc &= 3;
59
60 if (subsrc != 0) {
61 if (subsrc & 1) {
62 mydesc = irq_desc + IRQ_S3C2443_WDT;
63 desc_handle_irq(IRQ_S3C2443_WDT, mydesc);
64 }
65 if (subsrc & 2) {
66 mydesc = irq_desc + IRQ_S3C2443_AC97;
67 desc_handle_irq(IRQ_S3C2443_AC97, mydesc);
68 }
69 }
70}
71
72
73#define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
74
75static void
76s3c_irq_wdtac97_mask(unsigned int irqno)
77{
78 s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<27);
79}
80
81static void
82s3c_irq_wdtac97_unmask(unsigned int irqno)
83{
84 s3c_irqsub_unmask(irqno, INTMSK_WDT);
85}
86
87static void
88s3c_irq_wdtac97_ack(unsigned int irqno)
89{
90 s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<27);
91}
92
93static struct irq_chip s3c_irq_wdtac97 = {
94 .mask = s3c_irq_wdtac97_mask,
95 .unmask = s3c_irq_wdtac97_unmask,
96 .ack = s3c_irq_wdtac97_ack,
97};
98
99static int s3c2443_irq_add(struct sys_device *sysdev)
100{
101 unsigned int irqno;
102
103 printk("S3C2443: IRQ Support\n");
104
105 /* add new chained handler for wdt, ac7 */
106
107 set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
108 set_irq_handler(IRQ_WDT, handle_level_irq);
109 set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
110
111 for (irqno = IRQ_S3C2443_WDT; irqno <= IRQ_S3C2443_AC97; irqno++) {
112 set_irq_chip(irqno, &s3c_irq_wdtac97);
113 set_irq_handler(irqno, handle_level_irq);
114 set_irq_flags(irqno, IRQF_VALID);
115 }
116
117 return 0;
118}
119
120static struct sysdev_driver s3c2443_irq_driver = {
121 .add = s3c2443_irq_add,
122};
123
124static int s3c2443_irq_init(void)
125{
126 return sysdev_driver_register(&s3c2443_sysclass, &s3c2443_irq_driver);
127}
128
129arch_initcall(s3c2443_irq_init);
130