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authorBen Dooks <ben-linux@fluff.org>2010-04-27 23:58:13 -0400
committerBen Dooks <ben-linux@fluff.org>2010-05-09 22:44:38 -0400
commit4e04691bc600b53f6aab63404e58fae3bdf8e310 (patch)
treee38f054ccb1ed1eb49315a2da15851009229c163 /arch/arm/mach-s3c2443/clock.c
parente561aacc70716ff59b9359ba8f010609ee757241 (diff)
ARM: SAMSUNG: Add s3c_disable_clocks() and tidy init+disable usage
Add s3c_disable_clocks() and change the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c2443/clock.c')
-rw-r--r--arch/arm/mach-s3c2443/clock.c27
1 files changed, 4 insertions, 23 deletions
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index 62cd4eaee01b..76d8d66247c3 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -492,7 +492,7 @@ static struct clk clk_prediv = {
492 492
493/* standard clock definitions */ 493/* standard clock definitions */
494 494
495static struct clk init_clocks_disable[] = { 495static struct clk init_clocks_off[] = {
496 { 496 {
497 .name = "nand", 497 .name = "nand",
498 .id = -1, 498 .id = -1,
@@ -761,9 +761,7 @@ void __init_or_cpufreq s3c2443_setup_clocks(void)
761 761
762void __init s3c2443_init_clocks(int xtal) 762void __init s3c2443_init_clocks(int xtal)
763{ 763{
764 struct clk *clkp;
765 unsigned long epllcon = __raw_readl(S3C2443_EPLLCON); 764 unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);
766 int ret;
767 int ptr; 765 int ptr;
768 766
769 /* s3c2443 parents h and p clocks from prediv */ 767 /* s3c2443 parents h and p clocks from prediv */
@@ -774,15 +772,7 @@ void __init s3c2443_init_clocks(int xtal)
774 s3c2443_setup_clocks(); 772 s3c2443_setup_clocks();
775 s3c2443_clk_initparents(); 773 s3c2443_clk_initparents();
776 774
777 for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { 775 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
778 clkp = clks[ptr];
779
780 ret = s3c24xx_register_clock(clkp);
781 if (ret < 0) {
782 printk(KERN_ERR "Failed to register clock %s (%d)\n",
783 clkp->name, ret);
784 }
785 }
786 776
787 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++) 777 for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
788 s3c_register_clksrc(clksrcs[ptr], 1); 778 s3c_register_clksrc(clksrcs[ptr], 1);
@@ -819,17 +809,8 @@ void __init s3c2443_init_clocks(int xtal)
819 809
820 /* install (and disable) the clocks we do not need immediately */ 810 /* install (and disable) the clocks we do not need immediately */
821 811
822 clkp = init_clocks_disable; 812 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
823 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { 813 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
824
825 ret = s3c24xx_register_clock(clkp);
826 if (ret < 0) {
827 printk(KERN_ERR "Failed to register clock %s (%d)\n",
828 clkp->name, ret);
829 }
830
831 (clkp->enable)(clkp, 0);
832 }
833 814
834 s3c_pwmclk_init(); 815 s3c_pwmclk_init();
835} 816}