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authorBen Dooks <ben-linux@fluff.org>2008-04-15 19:12:39 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-04-17 12:04:40 -0400
commitd96a980441a70168a8ead0a0f23c4c63725da5fa (patch)
tree098551e6498fa641caaff62e352d21d7d9383c84 /arch/arm/mach-s3c2440
parent1017be88d341c05adc8d790d8092781b7330dafd (diff)
[ARM] 4986/1: S3C24XX: Simtec machines need UCLK as parent to DCLK
All current Simtec designs source the DCLK outputs from the UPLL. This means the DCLK's parent must be set to UPLL so that anything enabling and disabling an UPLL sourced clock does not shutdown the DCLK due to missing open counts. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2440')
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c4
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c5
2 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 3d3dfa95db8e..47258915a2f9 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -413,10 +413,10 @@ static void __init anubis_map_io(void)
413{ 413{
414 /* initialise the clocks */ 414 /* initialise the clocks */
415 415
416 s3c24xx_dclk0.parent = NULL; 416 s3c24xx_dclk0.parent = &clk_upll;
417 s3c24xx_dclk0.rate = 12*1000*1000; 417 s3c24xx_dclk0.rate = 12*1000*1000;
418 418
419 s3c24xx_dclk1.parent = NULL; 419 s3c24xx_dclk1.parent = &clk_upll;
420 s3c24xx_dclk1.rate = 24*1000*1000; 420 s3c24xx_dclk1.rate = 24*1000*1000;
421 421
422 s3c24xx_clkout0.parent = &s3c24xx_dclk0; 422 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index 78af7664988b..8a8acdbd072d 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -18,6 +18,7 @@
18#include <linux/device.h> 18#include <linux/device.h>
19#include <linux/sysdev.h> 19#include <linux/sysdev.h>
20#include <linux/serial_core.h> 20#include <linux/serial_core.h>
21#include <linux/clk.h>
21 22
22#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
23#include <asm/mach/map.h> 24#include <asm/mach/map.h>
@@ -344,10 +345,10 @@ static void __init osiris_map_io(void)
344 345
345 /* initialise the clocks */ 346 /* initialise the clocks */
346 347
347 s3c24xx_dclk0.parent = NULL; 348 s3c24xx_dclk0.parent = &clk_upll;
348 s3c24xx_dclk0.rate = 12*1000*1000; 349 s3c24xx_dclk0.rate = 12*1000*1000;
349 350
350 s3c24xx_dclk1.parent = NULL; 351 s3c24xx_dclk1.parent = &clk_upll;
351 s3c24xx_dclk1.rate = 24*1000*1000; 352 s3c24xx_dclk1.rate = 24*1000*1000;
352 353
353 s3c24xx_clkout0.parent = &s3c24xx_dclk0; 354 s3c24xx_clkout0.parent = &s3c24xx_dclk0;