diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-01-28 07:01:34 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-01-28 08:20:52 -0500 |
commit | 3a38e4be76e86c7b94c36dc8f3ce489987da24e4 (patch) | |
tree | 1b8ce87d0002c28fe9a8615151a28a3b666f5c17 /arch/arm/mach-s3c2440 | |
parent | c27cb681ac1598352569f75cb19850a12b7ef102 (diff) |
[ARM] 4794/1: S3C24XX: Comonise S3C2440 and S3C2442 clock code
Merge together the bits of the S3C2440 and S3C2442 clock code
that can be.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2440')
-rw-r--r-- | arch/arm/mach-s3c2440/clock.c | 22 |
1 files changed, 1 insertions, 21 deletions
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c index 79e2ea4adaf3..184d804934c9 100644 --- a/arch/arm/mach-s3c2440/clock.c +++ b/arch/arm/mach-s3c2440/clock.c | |||
@@ -111,14 +111,9 @@ static struct clk s3c2440_clk_ac97 = { | |||
111 | 111 | ||
112 | static int s3c2440_clk_add(struct sys_device *sysdev) | 112 | static int s3c2440_clk_add(struct sys_device *sysdev) |
113 | { | 113 | { |
114 | unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); | 114 | struct clk *clock_upll; |
115 | unsigned long clkdivn; | ||
116 | struct clk *clock_h; | 115 | struct clk *clock_h; |
117 | struct clk *clock_p; | 116 | struct clk *clock_p; |
118 | struct clk *clock_upll; | ||
119 | |||
120 | printk("S3C2440: Clock Support, DVS %s\n", | ||
121 | (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); | ||
122 | 117 | ||
123 | clock_p = clk_get(NULL, "pclk"); | 118 | clock_p = clk_get(NULL, "pclk"); |
124 | clock_h = clk_get(NULL, "hclk"); | 119 | clock_h = clk_get(NULL, "hclk"); |
@@ -129,21 +124,6 @@ static int s3c2440_clk_add(struct sys_device *sysdev) | |||
129 | return -EINVAL; | 124 | return -EINVAL; |
130 | } | 125 | } |
131 | 126 | ||
132 | /* check rate of UPLL, and if it is near 96MHz, then change | ||
133 | * to using half the UPLL rate for the system */ | ||
134 | |||
135 | if (clk_get_rate(clock_upll) > (94 * MHZ)) { | ||
136 | clk_usb_bus.rate = clk_get_rate(clock_upll) / 2; | ||
137 | |||
138 | mutex_lock(&clocks_mutex); | ||
139 | |||
140 | clkdivn = __raw_readl(S3C2410_CLKDIVN); | ||
141 | clkdivn |= S3C2440_CLKDIVN_UCLK; | ||
142 | __raw_writel(clkdivn, S3C2410_CLKDIVN); | ||
143 | |||
144 | mutex_unlock(&clocks_mutex); | ||
145 | } | ||
146 | |||
147 | s3c2440_clk_cam.parent = clock_h; | 127 | s3c2440_clk_cam.parent = clock_h; |
148 | s3c2440_clk_ac97.parent = clock_p; | 128 | s3c2440_clk_ac97.parent = clock_p; |
149 | s3c2440_clk_cam_upll.parent = clock_upll; | 129 | s3c2440_clk_cam_upll.parent = clock_upll; |