diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 09:06:38 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 16:46:08 -0500 |
commit | e425382ed90d221ef9031a1b2d97d9bfedcf90c3 (patch) | |
tree | ca36882dba4caf8a9726ed67216251360c80ef59 /arch/arm/mach-s3c2412 | |
parent | c3391e36d697c997b6afeb045071e0be95219a3e (diff) |
[ARM] S3C24XX: Update clock data on resume
Update the clock settings on resume for suspend/resume
support so that if the boot loader changes anything or
the system's PLL is reset then we return with the correct
settings.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c2412')
-rw-r--r-- | arch/arm/mach-s3c2412/s3c2412.c | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index 4bd2b5fb8669..5b5aba69ec3f 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/list.h> | 16 | #include <linux/list.h> |
17 | #include <linux/timer.h> | 17 | #include <linux/timer.h> |
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/clk.h> | ||
19 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
20 | #include <linux/sysdev.h> | 21 | #include <linux/sysdev.h> |
21 | #include <linux/serial_core.h> | 22 | #include <linux/serial_core.h> |
@@ -33,6 +34,8 @@ | |||
33 | #include <mach/reset.h> | 34 | #include <mach/reset.h> |
34 | #include <mach/idle.h> | 35 | #include <mach/idle.h> |
35 | 36 | ||
37 | #include <plat/cpu-freq.h> | ||
38 | |||
36 | #include <mach/regs-clock.h> | 39 | #include <mach/regs-clock.h> |
37 | #include <plat/regs-serial.h> | 40 | #include <plat/regs-serial.h> |
38 | #include <mach/regs-power.h> | 41 | #include <mach/regs-power.h> |
@@ -156,17 +159,23 @@ void __init s3c2412_map_io(void) | |||
156 | iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); | 159 | iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); |
157 | } | 160 | } |
158 | 161 | ||
159 | void __init s3c2412_init_clocks(int xtal) | 162 | void __init_or_cpufreq s3c2412_setup_clocks(void) |
160 | { | 163 | { |
164 | struct clk *xtal_clk; | ||
161 | unsigned long tmp; | 165 | unsigned long tmp; |
166 | unsigned long xtal; | ||
162 | unsigned long fclk; | 167 | unsigned long fclk; |
163 | unsigned long hclk; | 168 | unsigned long hclk; |
164 | unsigned long pclk; | 169 | unsigned long pclk; |
165 | 170 | ||
171 | xtal_clk = clk_get(NULL, "xtal"); | ||
172 | xtal = clk_get_rate(xtal_clk); | ||
173 | clk_put(xtal_clk); | ||
174 | |||
166 | /* now we've got our machine bits initialised, work out what | 175 | /* now we've got our machine bits initialised, work out what |
167 | * clocks we've got */ | 176 | * clocks we've got */ |
168 | 177 | ||
169 | fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2); | 178 | fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal * 2); |
170 | 179 | ||
171 | clk_mpll.rate = fclk; | 180 | clk_mpll.rate = fclk; |
172 | 181 | ||
@@ -183,11 +192,17 @@ void __init s3c2412_init_clocks(int xtal) | |||
183 | printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", | 192 | printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", |
184 | print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); | 193 | print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); |
185 | 194 | ||
195 | s3c24xx_setup_clocks(fclk, hclk, pclk); | ||
196 | } | ||
197 | |||
198 | void __init s3c2412_init_clocks(int xtal) | ||
199 | { | ||
186 | /* initialise the clocks here, to allow other things like the | 200 | /* initialise the clocks here, to allow other things like the |
187 | * console to use them | 201 | * console to use them |
188 | */ | 202 | */ |
189 | 203 | ||
190 | s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); | 204 | s3c24xx_register_baseclocks(xtal); |
205 | s3c2412_setup_clocks(); | ||
191 | s3c2412_baseclk_add(); | 206 | s3c2412_baseclk_add(); |
192 | } | 207 | } |
193 | 208 | ||