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authorWill Deacon <will.deacon@arm.com>2011-07-19 17:25:55 -0400
committerWill Deacon <will.deacon@arm.com>2011-08-31 05:18:00 -0400
commitc691bb6249b25104fcb6dad31bd772c139ce4a50 (patch)
tree0bcff4d0b191d91ab6738aa3a3120a3cc5425b17 /arch/arm/mach-s3c2412
parent25e29c7c0f4fcbe911b77a69f015bd6424cedcd0 (diff)
ARM: perf: index ARMv7 event counters starting from zero
The current ARMv7 PMU backend indexes event counters from two, with index zero being reserved and index one being used to represent the cycle counter. This patch tidies up the code by indexing from one instead (with zero for the cycle counter). This allows us to remove many of the accessor macros along with the counter enumeration and makes the code much more readable. Acked-by: Jamie Iles <jamie@jamieiles.com> Reviewed-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/mach-s3c2412')
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