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authorBen Dooks <ben-linux@fluff.org>2008-12-18 09:52:00 -0500
committerBen Dooks <ben-linux@fluff.org>2008-12-18 09:52:00 -0500
commitc6ad115876763e4f15055982ecb9579cb7abab5f (patch)
tree75d2b0f5f31540ff8a2dcdde9e0f087b25c68868 /arch/arm/mach-s3c2412
parent1d19fdba149f4db055902c30b27adfb7d1ead058 (diff)
parent28ab44c5be60a9b91021a7cc7b4e202775c04764 (diff)
Merge branch 'next-s3c24xx' into next-merged
Diffstat (limited to 'arch/arm/mach-s3c2412')
-rw-r--r--arch/arm/mach-s3c2412/s3c2412.c25
1 files changed, 20 insertions, 5 deletions
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index a086818e117e..5b5aba69ec3f 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -16,6 +16,7 @@
16#include <linux/list.h> 16#include <linux/list.h>
17#include <linux/timer.h> 17#include <linux/timer.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/clk.h>
19#include <linux/delay.h> 20#include <linux/delay.h>
20#include <linux/sysdev.h> 21#include <linux/sysdev.h>
21#include <linux/serial_core.h> 22#include <linux/serial_core.h>
@@ -33,6 +34,8 @@
33#include <mach/reset.h> 34#include <mach/reset.h>
34#include <mach/idle.h> 35#include <mach/idle.h>
35 36
37#include <plat/cpu-freq.h>
38
36#include <mach/regs-clock.h> 39#include <mach/regs-clock.h>
37#include <plat/regs-serial.h> 40#include <plat/regs-serial.h>
38#include <mach/regs-power.h> 41#include <mach/regs-power.h>
@@ -47,6 +50,7 @@
47#include <plat/devs.h> 50#include <plat/devs.h>
48#include <plat/clock.h> 51#include <plat/clock.h>
49#include <plat/pm.h> 52#include <plat/pm.h>
53#include <plat/pll.h>
50 54
51#ifndef CONFIG_CPU_S3C2412_ONLY 55#ifndef CONFIG_CPU_S3C2412_ONLY
52void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO; 56void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO;
@@ -136,7 +140,7 @@ static void s3c2412_hard_reset(void)
136 * machine specific initialisation. 140 * machine specific initialisation.
137*/ 141*/
138 142
139void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size) 143void __init s3c2412_map_io(void)
140{ 144{
141 /* move base of IO */ 145 /* move base of IO */
142 146
@@ -153,20 +157,25 @@ void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size)
153 /* register our io-tables */ 157 /* register our io-tables */
154 158
155 iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc)); 159 iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
156 iotable_init(mach_desc, mach_size);
157} 160}
158 161
159void __init s3c2412_init_clocks(int xtal) 162void __init_or_cpufreq s3c2412_setup_clocks(void)
160{ 163{
164 struct clk *xtal_clk;
161 unsigned long tmp; 165 unsigned long tmp;
166 unsigned long xtal;
162 unsigned long fclk; 167 unsigned long fclk;
163 unsigned long hclk; 168 unsigned long hclk;
164 unsigned long pclk; 169 unsigned long pclk;
165 170
171 xtal_clk = clk_get(NULL, "xtal");
172 xtal = clk_get_rate(xtal_clk);
173 clk_put(xtal_clk);
174
166 /* now we've got our machine bits initialised, work out what 175 /* now we've got our machine bits initialised, work out what
167 * clocks we've got */ 176 * clocks we've got */
168 177
169 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2); 178 fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal * 2);
170 179
171 clk_mpll.rate = fclk; 180 clk_mpll.rate = fclk;
172 181
@@ -183,11 +192,17 @@ void __init s3c2412_init_clocks(int xtal)
183 printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", 192 printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
184 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); 193 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
185 194
195 s3c24xx_setup_clocks(fclk, hclk, pclk);
196}
197
198void __init s3c2412_init_clocks(int xtal)
199{
186 /* initialise the clocks here, to allow other things like the 200 /* initialise the clocks here, to allow other things like the
187 * console to use them 201 * console to use them
188 */ 202 */
189 203
190 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); 204 s3c24xx_register_baseclocks(xtal);
205 s3c2412_setup_clocks();
191 s3c2412_baseclk_add(); 206 s3c2412_baseclk_add();
192} 207}
193 208