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authorBen Dooks <ben-linux@fluff.org>2010-01-30 02:19:59 -0500
committerBen Dooks <ben-linux@fluff.org>2010-03-07 17:56:07 -0500
commit9aa753c4422492547a190df8a3b6a56282669f9b (patch)
treed7d4b590727865bfec580de1263654a1b94db2da /arch/arm/mach-s3c2410
parent4ec07bba6945290c48dcc5b789cbd7adeabd7695 (diff)
ARM: S3C2443: Change to using plat-samsung clksrc-clk implementation
The S3C2443 clock code could easily make use of the clksrc implementation in plat-samsung for many of the clocks. Make the clocks that easily move to clksrc-clk over, update any initialisation and remove the old register definitions from the header file (it is only being used once). Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c2410')
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h29
1 files changed, 1 insertions, 28 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
index 6026d091a2fe..64217ca796b0 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
@@ -42,12 +42,6 @@
42 42
43#define S3C2443_PLLCON_OFF (1<<24) 43#define S3C2443_PLLCON_OFF (1<<24)
44 44
45#define S3C2443_CLKSRC_I2S_EXT (1<<14)
46#define S3C2443_CLKSRC_I2S_EPLLDIV (0<<14)
47#define S3C2443_CLKSRC_I2S_EPLLREF (2<<14)
48#define S3C2443_CLKSRC_I2S_EPLLREF3 (3<<14)
49#define S3C2443_CLKSRC_I2S_MASK (3<<14)
50
51#define S3C2443_CLKSRC_EPLLREF_XTAL (2<<7) 45#define S3C2443_CLKSRC_EPLLREF_XTAL (2<<7)
52#define S3C2443_CLKSRC_EPLLREF_EXTCLK (3<<7) 46#define S3C2443_CLKSRC_EPLLREF_EXTCLK (3<<7)
53#define S3C2443_CLKSRC_EPLLREF_MPLLREF (0<<7) 47#define S3C2443_CLKSRC_EPLLREF_MPLLREF (0<<7)
@@ -81,28 +75,7 @@
81#define S3C2443_CLKDIV0_ARMDIV_12 (13<<9) 75#define S3C2443_CLKDIV0_ARMDIV_12 (13<<9)
82#define S3C2443_CLKDIV0_ARMDIV_16 (15<<9) 76#define S3C2443_CLKDIV0_ARMDIV_16 (15<<9)
83 77
84/* S3C2443_CLKDIV1 */ 78/* S3C2443_CLKDIV1 removed, only used in clock.c code */
85
86#define S3C2443_CLKDIV1_CAMDIV_MASK (15<<26)
87#define S3C2443_CLKDIV1_CAMDIV_SHIFT (26)
88
89#define S3C2443_CLKDIV1_HSSPIDIV_MASK (3<<24)
90#define S3C2443_CLKDIV1_HSSPIDIV_SHIFT (24)
91
92#define S3C2443_CLKDIV1_DISPDIV_MASK (0xff<<16)
93#define S3C2443_CLKDIV1_DISPDIV_SHIFT (16)
94
95#define S3C2443_CLKDIV1_I2SDIV_MASK (15<<12)
96#define S3C2443_CLKDIV1_I2SDIV_SHIFT (12)
97
98#define S3C2443_CLKDIV1_UARTDIV_MASK (15<<8)
99#define S3C2443_CLKDIV1_UARTDIV_SHIFT (8)
100
101#define S3C2443_CLKDIV1_HSMMCDIV_MASK (3<<6)
102#define S3C2443_CLKDIV1_HSMMCDIV_SHIFT (6)
103
104#define S3C2443_CLKDIV1_USBHOSTDIV_MASK (3<<4)
105#define S3C2443_CLKDIV1_USBHOSTDIV_SHIFT (4)
106 79
107#define S3C2443_CLKCON_NAND 80#define S3C2443_CLKCON_NAND
108 81