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authorYauhen Kharuzhy <jekhor@gmail.com>2011-01-05 23:04:33 -0500
committerKukjin Kim <kgene.kim@samsung.com>2011-01-06 00:09:18 -0500
commit95d6791b4f8aad51caea657236234f21b50a4559 (patch)
tree875c6ef6081b5f422f78eeb6c62fc8341cf4d96a /arch/arm/mach-s3c2410
parent387c31c7e5c9805b0aef8833d1731a5fe7bdea14 (diff)
ARM: S3C24XX: Add address map and clock definitions for HSMMC0
Define maps for HSMMC devices. S3C2443 has one HSMMC device with base address 0x4A800000. S3C2416 has HSMMC0 at 0x4AC00000 and HSMMC1 at 0x4A800000. So suppose that S3C2443 has only HSMMC1. Define clock for hsmmc0 device and register it. Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c2410')
-rw-r--r--arch/arm/mach-s3c2410/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-s3c2410/include/mach/map.h4
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h1
3 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/irqs.h b/arch/arm/mach-s3c2410/include/mach/irqs.h
index 11bb0f08fe6a..e5a68ea13113 100644
--- a/arch/arm/mach-s3c2410/include/mach/irqs.h
+++ b/arch/arm/mach-s3c2410/include/mach/irqs.h
@@ -152,8 +152,8 @@
152 152
153#define IRQ_S3C2416_HSMMC0 S3C2410_IRQ(21) /* S3C2416/S3C2450 */ 153#define IRQ_S3C2416_HSMMC0 S3C2410_IRQ(21) /* S3C2416/S3C2450 */
154 154
155#define IRQ_HSMMC0 IRQ_S3C2443_HSMMC 155#define IRQ_HSMMC0 IRQ_S3C2416_HSMMC0
156#define IRQ_HSMMC1 IRQ_S3C2416_HSMMC0 156#define IRQ_HSMMC1 IRQ_S3C2443_HSMMC
157 157
158#define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14) 158#define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14)
159#define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15) 159#define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15)
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h
index cd3983ad4160..25bbf5a942dd 100644
--- a/arch/arm/mach-s3c2410/include/mach/map.h
+++ b/arch/arm/mach-s3c2410/include/mach/map.h
@@ -112,8 +112,8 @@
112#define S3C_PA_IIC S3C2410_PA_IIC 112#define S3C_PA_IIC S3C2410_PA_IIC
113#define S3C_PA_UART S3C24XX_PA_UART 113#define S3C_PA_UART S3C24XX_PA_UART
114#define S3C_PA_USBHOST S3C2410_PA_USBHOST 114#define S3C_PA_USBHOST S3C2410_PA_USBHOST
115#define S3C_PA_HSMMC0 S3C2443_PA_HSMMC 115#define S3C_PA_HSMMC0 S3C2416_PA_HSMMC0
116#define S3C_PA_HSMMC1 S3C2416_PA_HSMMC0 116#define S3C_PA_HSMMC1 S3C2443_PA_HSMMC
117#define S3C_PA_WDT S3C2410_PA_WATCHDOG 117#define S3C_PA_WDT S3C2410_PA_WATCHDOG
118#define S3C_PA_NAND S3C24XX_PA_NAND 118#define S3C_PA_NAND S3C24XX_PA_NAND
119 119
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
index 101aeea22310..44494a56e68b 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
@@ -86,6 +86,7 @@
86#define S3C2443_HCLKCON_LCDC (1<<9) 86#define S3C2443_HCLKCON_LCDC (1<<9)
87#define S3C2443_HCLKCON_USBH (1<<11) 87#define S3C2443_HCLKCON_USBH (1<<11)
88#define S3C2443_HCLKCON_USBD (1<<12) 88#define S3C2443_HCLKCON_USBD (1<<12)
89#define S3C2416_HCLKCON_HSMMC0 (1<<15)
89#define S3C2443_HCLKCON_HSMMC (1<<16) 90#define S3C2443_HCLKCON_HSMMC (1<<16)
90#define S3C2443_HCLKCON_CFC (1<<17) 91#define S3C2443_HCLKCON_CFC (1<<17)
91#define S3C2443_HCLKCON_SSMC (1<<18) 92#define S3C2443_HCLKCON_SSMC (1<<18)