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authorBen Dooks <ben-linux@fluff.org>2010-05-19 05:04:08 -0400
committerBen Dooks <ben-linux@fluff.org>2010-05-19 05:04:08 -0400
commitff1b8ba01dc80da338890a187c112fdd3c0b9202 (patch)
tree415999aa2c3ac52e48c2b6f690bba393e3d7a00c /arch/arm/mach-s3c2410
parent5fcdb16bd04fdeb313ee33bb269b04e59a9abf91 (diff)
parent32b6cb3872883861f3a2669cce880f3a7ef8979a (diff)
ARM: Merge for-2635/gpio2
Merge branch 'for-2635/gpio2' into for-linus/samsung2
Diffstat (limited to 'arch/arm/mach-s3c2410')
-rw-r--r--arch/arm/mach-s3c2410/Kconfig1
-rw-r--r--arch/arm/mach-s3c2410/h1940-bluetooth.c32
-rw-r--r--arch/arm/mach-s3c2410/include/mach/gpio-fns.h47
-rw-r--r--arch/arm/mach-s3c2410/include/mach/gpio-nrs.h37
-rw-r--r--arch/arm/mach-s3c2410/include/mach/gpio-track.h4
-rw-r--r--arch/arm/mach-s3c2410/include/mach/gpio.h8
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-gpio.h39
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-gpioj.h36
-rw-r--r--arch/arm/mach-s3c2410/mach-amlm5900.c5
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c9
-rw-r--r--arch/arm/mach-s3c2410/mach-h1940.c20
-rw-r--r--arch/arm/mach-s3c2410/mach-n30.c3
-rw-r--r--arch/arm/mach-s3c2410/mach-qt2410.c10
-rw-r--r--arch/arm/mach-s3c2410/mach-vr1000.c5
-rw-r--r--arch/arm/mach-s3c2410/s3c2410.c8
15 files changed, 144 insertions, 120 deletions
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 163b60e2af96..a4c0b3fcdbba 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -6,6 +6,7 @@ config CPU_S3C2410
6 bool 6 bool
7 depends on ARCH_S3C2410 7 depends on ARCH_S3C2410
8 select CPU_ARM920T 8 select CPU_ARM920T
9 select S3C_GPIO_PULL_UP
9 select S3C2410_CLOCK 10 select S3C2410_CLOCK
10 select S3C2410_GPIO 11 select S3C2410_GPIO
11 select CPU_LLSERIAL_S3C2410 12 select CPU_LLSERIAL_S3C2410
diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c
index a3f3c7b1ca38..8cdeb14af592 100644
--- a/arch/arm/mach-s3c2410/h1940-bluetooth.c
+++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c
@@ -33,14 +33,15 @@ static void h1940bt_enable(int on)
33 h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER); 33 h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER);
34 /* Reset the chip */ 34 /* Reset the chip */
35 mdelay(10); 35 mdelay(10);
36 s3c2410_gpio_setpin(S3C2410_GPH(1), 1); 36
37 gpio_set_value(S3C2410_GPH(1), 1);
37 mdelay(10); 38 mdelay(10);
38 s3c2410_gpio_setpin(S3C2410_GPH(1), 0); 39 gpio_set_value(S3C2410_GPH(1), 0);
39 } 40 }
40 else { 41 else {
41 s3c2410_gpio_setpin(S3C2410_GPH(1), 1); 42 gpio_set_value(S3C2410_GPH(1), 1);
42 mdelay(10); 43 mdelay(10);
43 s3c2410_gpio_setpin(S3C2410_GPH(1), 0); 44 gpio_set_value(S3C2410_GPH(1), 0);
44 mdelay(10); 45 mdelay(10);
45 h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0); 46 h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0);
46 } 47 }
@@ -61,15 +62,21 @@ static int __devinit h1940bt_probe(struct platform_device *pdev)
61 struct rfkill *rfk; 62 struct rfkill *rfk;
62 int ret = 0; 63 int ret = 0;
63 64
65 ret = gpio_request(S3C2410_GPH(1), dev_name(&pdev->dev));
66 if (ret) {
67 dev_err(&pdev->dev, "could not get GPH1\n");\
68 return ret;
69 }
70
64 /* Configures BT serial port GPIOs */ 71 /* Configures BT serial port GPIOs */
65 s3c2410_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0); 72 s3c_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0);
66 s3c2410_gpio_pullup(S3C2410_GPH(0), 1); 73 s3c_gpio_cfgpull(S3C2410_GPH(0), S3C_GPIO_PULL_NONE);
67 s3c2410_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT); 74 s3c_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT);
68 s3c2410_gpio_pullup(S3C2410_GPH(1), 1); 75 s3c_gpio_cfgpull(S3C2410_GPH(1), S3C_GPIO_PULL_NONE);
69 s3c2410_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0); 76 s3c_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0);
70 s3c2410_gpio_pullup(S3C2410_GPH(2), 1); 77 s3c_gpio_cfgpull(S3C2410_GPH(2), S3C_GPIO_PULL_NONE);
71 s3c2410_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0); 78 s3c_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0);
72 s3c2410_gpio_pullup(S3C2410_GPH(3), 1); 79 s3c_gpio_cfgpull(S3C2410_GPH(3), S3C_GPIO_PULL_NONE);
73 80
74 81
75 rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH, 82 rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH,
@@ -100,6 +107,7 @@ static int h1940bt_remove(struct platform_device *pdev)
100 struct rfkill *rfk = platform_get_drvdata(pdev); 107 struct rfkill *rfk = platform_get_drvdata(pdev);
101 108
102 platform_set_drvdata(pdev, NULL); 109 platform_set_drvdata(pdev, NULL);
110 gpio_free(S3C2410_GPH(1));
103 111
104 if (rfk) { 112 if (rfk) {
105 rfkill_unregister(rfk); 113 rfkill_unregister(rfk);
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h b/arch/arm/mach-s3c2410/include/mach/gpio-fns.h
index 035a493952db..f453c4f2cb8e 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-fns.h
@@ -10,14 +10,28 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#ifndef __MACH_GPIO_FNS_H
14#define __MACH_GPIO_FNS_H __FILE__
15
13/* These functions are in the to-be-removed category and it is strongly 16/* These functions are in the to-be-removed category and it is strongly
14 * encouraged not to use these in new code. They will be marked deprecated 17 * encouraged not to use these in new code. They will be marked deprecated
15 * very soon. 18 * very soon.
16 * 19 *
17 * Most of the functionality can be either replaced by the gpiocfg calls 20 * Most of the functionality can be either replaced by the gpiocfg calls
18 * for the s3c platform or by the generic GPIOlib API. 21 * for the s3c platform or by the generic GPIOlib API.
22 *
23 * As of 2.6.35-rc, these will be removed, with the few drivers using them
24 * either replaced or given a wrapper until the calls can be removed.
19*/ 25*/
20 26
27#include <plat/gpio-cfg.h>
28
29static inline void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int cfg)
30{
31 /* 1:1 mapping between cfgpin and setcfg calls at the moment */
32 s3c_gpio_cfgpin(pin, cfg);
33}
34
21/* external functions for GPIO support 35/* external functions for GPIO support
22 * 36 *
23 * These allow various different clients to access the same GPIO 37 * These allow various different clients to access the same GPIO
@@ -25,17 +39,6 @@
25 * GPIO register, then it is safe to ioremap/__raw_{read|write} to it. 39 * GPIO register, then it is safe to ioremap/__raw_{read|write} to it.
26*/ 40*/
27 41
28/* s3c2410_gpio_cfgpin
29 *
30 * set the configuration of the given pin to the value passed.
31 *
32 * eg:
33 * s3c2410_gpio_cfgpin(S3C2410_GPA(0), S3C2410_GPA0_ADDR0);
34 * s3c2410_gpio_cfgpin(S3C2410_GPE(8), S3C2410_GPE8_SDDAT1);
35*/
36
37extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function);
38
39extern unsigned int s3c2410_gpio_getcfg(unsigned int pin); 42extern unsigned int s3c2410_gpio_getcfg(unsigned int pin);
40 43
41/* s3c2410_gpio_getirq 44/* s3c2410_gpio_getirq
@@ -73,6 +76,14 @@ extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
73 76
74/* s3c2410_gpio_pullup 77/* s3c2410_gpio_pullup
75 * 78 *
79 * This call should be replaced with s3c_gpio_setpull().
80 *
81 * As a note, there is currently no distinction between pull-up and pull-down
82 * in the s3c24xx series devices with only an on/off configuration.
83 */
84
85/* s3c2410_gpio_pullup
86 *
76 * configure the pull-up control on the given pin 87 * configure the pull-up control on the given pin
77 * 88 *
78 * to = 1 => disable the pull-up 89 * to = 1 => disable the pull-up
@@ -86,18 +97,8 @@ extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
86 97
87extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to); 98extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to);
88 99
89/* s3c2410_gpio_getpull
90 *
91 * Read the state of the pull-up on a given pin
92 *
93 * return:
94 * < 0 => error code
95 * 0 => enabled
96 * 1 => disabled
97*/
98
99extern int s3c2410_gpio_getpull(unsigned int pin);
100
101extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to); 100extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to);
102 101
103extern unsigned int s3c2410_gpio_getpin(unsigned int pin); 102extern unsigned int s3c2410_gpio_getpin(unsigned int pin);
103
104#endif /* __MACH_GPIO_FNS_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h b/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
index 2edbb9c88ab3..4f7bf3272e87 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h
@@ -16,15 +16,28 @@
16 16
17#define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) 17#define S3C2410_GPIONO(bank,offset) ((bank) + (offset))
18 18
19#define S3C2410_GPIO_BANKA (32*0)
20#define S3C2410_GPIO_BANKB (32*1)
21#define S3C2410_GPIO_BANKC (32*2)
22#define S3C2410_GPIO_BANKD (32*3)
23#define S3C2410_GPIO_BANKE (32*4)
24#define S3C2410_GPIO_BANKF (32*5)
25#define S3C2410_GPIO_BANKG (32*6) 19#define S3C2410_GPIO_BANKG (32*6)
26#define S3C2410_GPIO_BANKH (32*7) 20#define S3C2410_GPIO_BANKH (32*7)
27 21
22/* GPIO sizes for various SoCs:
23 *
24 * 2442
25 * 2410 2412 2440 2443 2416
26 * ---- ---- ---- ---- ----
27 * A 23 22 25 16 25
28 * B 11 11 11 11 9
29 * C 16 15 16 16 16
30 * D 16 16 16 16 16
31 * E 16 16 16 16 16
32 * F 8 8 8 8 8
33 * G 16 16 16 16 8
34 * H 11 11 9 15 15
35 * J -- -- 13 16 --
36 * K -- -- -- -- 16
37 * L -- -- -- 15 7
38 * M -- -- -- 2 2
39 */
40
28/* GPIO bank sizes */ 41/* GPIO bank sizes */
29#define S3C2410_GPIO_A_NR (32) 42#define S3C2410_GPIO_A_NR (32)
30#define S3C2410_GPIO_B_NR (32) 43#define S3C2410_GPIO_B_NR (32)
@@ -34,6 +47,10 @@
34#define S3C2410_GPIO_F_NR (32) 47#define S3C2410_GPIO_F_NR (32)
35#define S3C2410_GPIO_G_NR (32) 48#define S3C2410_GPIO_G_NR (32)
36#define S3C2410_GPIO_H_NR (32) 49#define S3C2410_GPIO_H_NR (32)
50#define S3C2410_GPIO_J_NR (32) /* technically 16. */
51#define S3C2410_GPIO_K_NR (32) /* technically 16. */
52#define S3C2410_GPIO_L_NR (32) /* technically 15. */
53#define S3C2410_GPIO_M_NR (32) /* technically 2. */
37 54
38#if CONFIG_S3C_GPIO_SPACE != 0 55#if CONFIG_S3C_GPIO_SPACE != 0
39#error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment 56#error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment
@@ -53,6 +70,10 @@ enum s3c_gpio_number {
53 S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E), 70 S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
54 S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F), 71 S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
55 S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G), 72 S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
73 S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
74 S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
75 S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
76 S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
56}; 77};
57 78
58#endif /* __ASSEMBLY__ */ 79#endif /* __ASSEMBLY__ */
@@ -67,6 +88,10 @@ enum s3c_gpio_number {
67#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr)) 88#define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr))
68#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr)) 89#define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr))
69#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr)) 90#define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr))
91#define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr))
92#define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr))
93#define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr))
94#define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr))
70 95
71/* compatibility until drivers can be modified */ 96/* compatibility until drivers can be modified */
72 97
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-track.h b/arch/arm/mach-s3c2410/include/mach/gpio-track.h
index acb259103808..d67819dde42a 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio-track.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio-track.h
@@ -23,11 +23,11 @@ static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int pin)
23{ 23{
24 struct s3c_gpio_chip *chip; 24 struct s3c_gpio_chip *chip;
25 25
26 if (pin > S3C2410_GPG(10)) 26 if (pin > S3C_GPIO_END)
27 return NULL; 27 return NULL;
28 28
29 chip = &s3c24xx_gpios[pin/32]; 29 chip = &s3c24xx_gpios[pin/32];
30 return (S3C2410_GPIO_OFFSET(pin) < chip->chip.ngpio) ? chip : NULL; 30 return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL;
31} 31}
32 32
33#endif /* __ASM_ARCH_GPIO_CORE_H */ 33#endif /* __ASM_ARCH_GPIO_CORE_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio.h b/arch/arm/mach-s3c2410/include/mach/gpio.h
index 15f0b3e7ce69..b649bf2ccd5c 100644
--- a/arch/arm/mach-s3c2410/include/mach/gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/gpio.h
@@ -20,10 +20,18 @@
20 * devices that need GPIO. 20 * devices that need GPIO.
21 */ 21 */
22 22
23#ifdef CONFIG_CPU_S3C244X
24#define ARCH_NR_GPIOS (32 * 9 + CONFIG_S3C24XX_GPIO_EXTRA)
25#else
23#define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA) 26#define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA)
27#endif
24 28
25#include <asm-generic/gpio.h> 29#include <asm-generic/gpio.h>
26#include <mach/gpio-nrs.h> 30#include <mach/gpio-nrs.h>
27#include <mach/gpio-fns.h> 31#include <mach/gpio-fns.h>
28 32
33#ifdef CONFIG_CPU_S3C24XX
34#define S3C_GPIO_END (S3C2410_GPIO_BANKJ + 32)
35#else
29#define S3C_GPIO_END (S3C2410_GPIO_BANKH + 32) 36#define S3C_GPIO_END (S3C2410_GPIO_BANKH + 32)
37#endif
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
index fd672f330bf2..95e29fefec34 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
@@ -17,29 +17,11 @@
17#include <mach/gpio-nrs.h> 17#include <mach/gpio-nrs.h>
18 18
19#ifdef CONFIG_CPU_S3C2400 19#ifdef CONFIG_CPU_S3C2400
20#define S3C24XX_GPIO_BASE(x) S3C2400_GPIO_BASE(x) 20#define S3C24XX_MISCCR S3C2400_MISCCR
21#define S3C24XX_MISCCR S3C2400_MISCCR
22#else 21#else
23#define S3C24XX_GPIO_BASE(x) S3C2410_GPIO_BASE(x) 22#define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80)
24#define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80)
25#endif /* CONFIG_CPU_S3C2400 */ 23#endif /* CONFIG_CPU_S3C2400 */
26 24
27
28/* S3C2400 doesn't have a 1:1 mapping to S3C2410 gpio base pins */
29
30#define S3C2400_BANKNUM(pin) (((pin) & ~31) / 32)
31#define S3C2400_BASEA2B(pin) ((((pin) & ~31) >> 2))
32#define S3C2400_BASEC2H(pin) ((S3C2400_BANKNUM(pin) * 10) + \
33 (2 * (S3C2400_BANKNUM(pin)-2)))
34
35#define S3C2400_GPIO_BASE(pin) (pin < S3C2410_GPIO_BANKC ? \
36 S3C2400_BASEA2B(pin)+S3C24XX_VA_GPIO : \
37 S3C2400_BASEC2H(pin)+S3C24XX_VA_GPIO)
38
39
40#define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C24XX_VA_GPIO)
41#define S3C2410_GPIO_OFFSET(pin) ((pin) & 31)
42
43/* general configuration options */ 25/* general configuration options */
44 26
45#define S3C2410_GPIO_LEAVE (0xFFFFFFFF) 27#define S3C2410_GPIO_LEAVE (0xFFFFFFFF)
@@ -639,6 +621,23 @@
639 * for the 2412/2413 from the 2410/2440/2442 621 * for the 2412/2413 from the 2410/2440/2442
640*/ 622*/
641 623
624/* S3C2443 and above */
625#define S3C2440_GPJCON S3C2410_GPIOREG(0xD0)
626#define S3C2440_GPJDAT S3C2410_GPIOREG(0xD4)
627#define S3C2440_GPJUP S3C2410_GPIOREG(0xD8)
628
629#define S3C2443_GPKCON S3C2410_GPIOREG(0xE0)
630#define S3C2443_GPKDAT S3C2410_GPIOREG(0xE4)
631#define S3C2443_GPKUP S3C2410_GPIOREG(0xE8)
632
633#define S3C2443_GPLCON S3C2410_GPIOREG(0xF0)
634#define S3C2443_GPLDAT S3C2410_GPIOREG(0xF4)
635#define S3C2443_GPLUP S3C2410_GPIOREG(0xF8)
636
637#define S3C2443_GPMCON S3C2410_GPIOREG(0x100)
638#define S3C2443_GPMDAT S3C2410_GPIOREG(0x104)
639#define S3C2443_GPMUP S3C2410_GPIOREG(0x108)
640
642/* miscellaneous control */ 641/* miscellaneous control */
643#define S3C2400_MISCCR S3C2410_GPIOREG(0x54) 642#define S3C2400_MISCCR S3C2410_GPIOREG(0x54)
644#define S3C2410_MISCCR S3C2410_GPIOREG(0x80) 643#define S3C2410_MISCCR S3C2410_GPIOREG(0x80)
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h b/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h
index 1202ca5e99f6..19575e061114 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h
@@ -22,85 +22,49 @@
22 * pull up works like all other ports. 22 * pull up works like all other ports.
23*/ 23*/
24 24
25#define S3C2440_GPIO_BANKJ (416)
26
27#define S3C2440_GPJCON S3C2410_GPIOREG(0xd0)
28#define S3C2440_GPJDAT S3C2410_GPIOREG(0xd4)
29#define S3C2440_GPJUP S3C2410_GPIOREG(0xd8)
30
31#define S3C2413_GPJCON S3C2410_GPIOREG(0x80) 25#define S3C2413_GPJCON S3C2410_GPIOREG(0x80)
32#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84) 26#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84)
33#define S3C2413_GPJUP S3C2410_GPIOREG(0x88) 27#define S3C2413_GPJUP S3C2410_GPIOREG(0x88)
34#define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C) 28#define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C)
35 29
36#define S3C2440_GPJ0 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 0)
37#define S3C2440_GPJ0_INP (0x00 << 0)
38#define S3C2440_GPJ0_OUTP (0x01 << 0) 30#define S3C2440_GPJ0_OUTP (0x01 << 0)
39#define S3C2440_GPJ0_CAMDATA0 (0x02 << 0) 31#define S3C2440_GPJ0_CAMDATA0 (0x02 << 0)
40 32
41#define S3C2440_GPJ1 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 1)
42#define S3C2440_GPJ1_INP (0x00 << 2)
43#define S3C2440_GPJ1_OUTP (0x01 << 2) 33#define S3C2440_GPJ1_OUTP (0x01 << 2)
44#define S3C2440_GPJ1_CAMDATA1 (0x02 << 2) 34#define S3C2440_GPJ1_CAMDATA1 (0x02 << 2)
45 35
46#define S3C2440_GPJ2 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 2)
47#define S3C2440_GPJ2_INP (0x00 << 4)
48#define S3C2440_GPJ2_OUTP (0x01 << 4) 36#define S3C2440_GPJ2_OUTP (0x01 << 4)
49#define S3C2440_GPJ2_CAMDATA2 (0x02 << 4) 37#define S3C2440_GPJ2_CAMDATA2 (0x02 << 4)
50 38
51#define S3C2440_GPJ3 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 3)
52#define S3C2440_GPJ3_INP (0x00 << 6)
53#define S3C2440_GPJ3_OUTP (0x01 << 6) 39#define S3C2440_GPJ3_OUTP (0x01 << 6)
54#define S3C2440_GPJ3_CAMDATA3 (0x02 << 6) 40#define S3C2440_GPJ3_CAMDATA3 (0x02 << 6)
55 41
56#define S3C2440_GPJ4 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 4)
57#define S3C2440_GPJ4_INP (0x00 << 8)
58#define S3C2440_GPJ4_OUTP (0x01 << 8) 42#define S3C2440_GPJ4_OUTP (0x01 << 8)
59#define S3C2440_GPJ4_CAMDATA4 (0x02 << 8) 43#define S3C2440_GPJ4_CAMDATA4 (0x02 << 8)
60 44
61#define S3C2440_GPJ5 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 5)
62#define S3C2440_GPJ5_INP (0x00 << 10)
63#define S3C2440_GPJ5_OUTP (0x01 << 10) 45#define S3C2440_GPJ5_OUTP (0x01 << 10)
64#define S3C2440_GPJ5_CAMDATA5 (0x02 << 10) 46#define S3C2440_GPJ5_CAMDATA5 (0x02 << 10)
65 47
66#define S3C2440_GPJ6 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 6)
67#define S3C2440_GPJ6_INP (0x00 << 12)
68#define S3C2440_GPJ6_OUTP (0x01 << 12) 48#define S3C2440_GPJ6_OUTP (0x01 << 12)
69#define S3C2440_GPJ6_CAMDATA6 (0x02 << 12) 49#define S3C2440_GPJ6_CAMDATA6 (0x02 << 12)
70 50
71#define S3C2440_GPJ7 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 7)
72#define S3C2440_GPJ7_INP (0x00 << 14)
73#define S3C2440_GPJ7_OUTP (0x01 << 14) 51#define S3C2440_GPJ7_OUTP (0x01 << 14)
74#define S3C2440_GPJ7_CAMDATA7 (0x02 << 14) 52#define S3C2440_GPJ7_CAMDATA7 (0x02 << 14)
75 53
76#define S3C2440_GPJ8 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 8)
77#define S3C2440_GPJ8_INP (0x00 << 16)
78#define S3C2440_GPJ8_OUTP (0x01 << 16) 54#define S3C2440_GPJ8_OUTP (0x01 << 16)
79#define S3C2440_GPJ8_CAMPCLK (0x02 << 16) 55#define S3C2440_GPJ8_CAMPCLK (0x02 << 16)
80 56
81#define S3C2440_GPJ9 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 9)
82#define S3C2440_GPJ9_INP (0x00 << 18)
83#define S3C2440_GPJ9_OUTP (0x01 << 18) 57#define S3C2440_GPJ9_OUTP (0x01 << 18)
84#define S3C2440_GPJ9_CAMVSYNC (0x02 << 18) 58#define S3C2440_GPJ9_CAMVSYNC (0x02 << 18)
85 59
86#define S3C2440_GPJ10 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 10)
87#define S3C2440_GPJ10_INP (0x00 << 20)
88#define S3C2440_GPJ10_OUTP (0x01 << 20) 60#define S3C2440_GPJ10_OUTP (0x01 << 20)
89#define S3C2440_GPJ10_CAMHREF (0x02 << 20) 61#define S3C2440_GPJ10_CAMHREF (0x02 << 20)
90 62
91#define S3C2440_GPJ11 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 11)
92#define S3C2440_GPJ11_INP (0x00 << 22)
93#define S3C2440_GPJ11_OUTP (0x01 << 22) 63#define S3C2440_GPJ11_OUTP (0x01 << 22)
94#define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22) 64#define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22)
95 65
96#define S3C2440_GPJ12 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 12)
97#define S3C2440_GPJ12_INP (0x00 << 24)
98#define S3C2440_GPJ12_OUTP (0x01 << 24) 66#define S3C2440_GPJ12_OUTP (0x01 << 24)
99#define S3C2440_GPJ12_CAMRESET (0x02 << 24) 67#define S3C2440_GPJ12_CAMRESET (0x02 << 24)
100 68
101#define S3C2443_GPJ13 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 13)
102#define S3C2443_GPJ14 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 14)
103#define S3C2443_GPJ15 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 15)
104
105#endif /* __ASM_ARCH_REGS_GPIOJ_H */ 69#endif /* __ASM_ARCH_REGS_GPIOJ_H */
106 70
diff --git a/arch/arm/mach-s3c2410/mach-amlm5900.c b/arch/arm/mach-s3c2410/mach-amlm5900.c
index 7047317ed7f4..34fc05a4244b 100644
--- a/arch/arm/mach-s3c2410/mach-amlm5900.c
+++ b/arch/arm/mach-s3c2410/mach-amlm5900.c
@@ -56,6 +56,7 @@
56#include <plat/iic.h> 56#include <plat/iic.h>
57#include <plat/devs.h> 57#include <plat/devs.h>
58#include <plat/cpu.h> 58#include <plat/cpu.h>
59#include <plat/gpio-cfg.h>
59 60
60#ifdef CONFIG_MTD_PARTITIONS 61#ifdef CONFIG_MTD_PARTITIONS
61 62
@@ -225,8 +226,8 @@ static void amlm5900_init_pm(void)
225 } else { 226 } else {
226 enable_irq_wake(IRQ_EINT9); 227 enable_irq_wake(IRQ_EINT9);
227 /* configure the suspend/resume status pin */ 228 /* configure the suspend/resume status pin */
228 s3c2410_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT); 229 s3c_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT);
229 s3c2410_gpio_pullup(S3C2410_GPF(2), 0); 230 s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_UP);
230 } 231 }
231} 232}
232static void __init amlm5900_init(void) 233static void __init amlm5900_init(void)
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index c8786df72b9e..c1f90f6fab42 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -61,6 +61,7 @@
61#include <plat/devs.h> 61#include <plat/devs.h>
62#include <plat/cpu.h> 62#include <plat/cpu.h>
63#include <plat/cpu-freq.h> 63#include <plat/cpu-freq.h>
64#include <plat/gpio-cfg.h>
64#include <plat/audio-simtec.h> 65#include <plat/audio-simtec.h>
65 66
66#include "usb-simtec.h" 67#include "usb-simtec.h"
@@ -216,15 +217,13 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
216static int bast_pm_suspend(struct sys_device *sd, pm_message_t state) 217static int bast_pm_suspend(struct sys_device *sd, pm_message_t state)
217{ 218{
218 /* ensure that an nRESET is not generated on resume. */ 219 /* ensure that an nRESET is not generated on resume. */
219 s3c2410_gpio_setpin(S3C2410_GPA(21), 1); 220 gpio_direction_output(S3C2410_GPA(21), 1);
220 s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPIO_OUTPUT);
221
222 return 0; 221 return 0;
223} 222}
224 223
225static int bast_pm_resume(struct sys_device *sd) 224static int bast_pm_resume(struct sys_device *sd)
226{ 225{
227 s3c2410_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT); 226 s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT);
228 return 0; 227 return 0;
229} 228}
230 229
@@ -658,6 +657,8 @@ static void __init bast_init(void)
658 nor_simtec_init(); 657 nor_simtec_init();
659 simtec_audio_add(NULL, true, &bast_audio); 658 simtec_audio_add(NULL, true, &bast_audio);
660 659
660 WARN_ON(gpio_request(S3C2410_GPA(21), "bast nreset"));
661
661 s3c_cpufreq_setboard(&bast_cpufreq); 662 s3c_cpufreq_setboard(&bast_cpufreq);
662} 663}
663 664
diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c
index 03028b98f362..d2a2fad7db97 100644
--- a/arch/arm/mach-s3c2410/mach-h1940.c
+++ b/arch/arm/mach-s3c2410/mach-h1940.c
@@ -50,6 +50,7 @@
50#include <plat/udc.h> 50#include <plat/udc.h>
51#include <plat/iic.h> 51#include <plat/iic.h>
52 52
53#include <plat/gpio-cfg.h>
53#include <plat/clock.h> 54#include <plat/clock.h>
54#include <plat/devs.h> 55#include <plat/devs.h>
55#include <plat/cpu.h> 56#include <plat/cpu.h>
@@ -207,16 +208,16 @@ static int h1940_backlight_init(struct device *dev)
207{ 208{
208 gpio_request(S3C2410_GPB(0), "Backlight"); 209 gpio_request(S3C2410_GPB(0), "Backlight");
209 210
210 s3c2410_gpio_setpin(S3C2410_GPB(0), 0); 211 gpio_direction_output(S3C2410_GPB(0), 0);
211 s3c2410_gpio_pullup(S3C2410_GPB(0), 0); 212 s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE);
212 s3c2410_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); 213 s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0);
213 214
214 return 0; 215 return 0;
215} 216}
216 217
217static void h1940_backlight_exit(struct device *dev) 218static void h1940_backlight_exit(struct device *dev)
218{ 219{
219 s3c2410_gpio_cfgpin(S3C2410_GPB(0), 1/*S3C2410_GPB0_OUTP*/); 220 gpio_direction_output(S3C2410_GPB(0), 1);
220} 221}
221 222
222static struct platform_pwm_backlight_data backlight_data = { 223static struct platform_pwm_backlight_data backlight_data = {
@@ -245,18 +246,18 @@ static void h1940_lcd_power_set(struct plat_lcd_data *pd,
245 246
246 if (!power) { 247 if (!power) {
247 /* set to 3ec */ 248 /* set to 3ec */
248 s3c2410_gpio_setpin(S3C2410_GPC(0), 0); 249 gpio_direction_output(S3C2410_GPC(0), 0);
249 /* wait for 3ac */ 250 /* wait for 3ac */
250 do { 251 do {
251 value = s3c2410_gpio_getpin(S3C2410_GPC(6)); 252 value = gpio_get_value(S3C2410_GPC(6));
252 } while (value); 253 } while (value);
253 /* set to 38c */ 254 /* set to 38c */
254 s3c2410_gpio_setpin(S3C2410_GPC(5), 0); 255 gpio_direction_output(S3C2410_GPC(5), 0);
255 } else { 256 } else {
256 /* Set to 3ac */ 257 /* Set to 3ac */
257 s3c2410_gpio_setpin(S3C2410_GPC(5), 1); 258 gpio_direction_output(S3C2410_GPC(5), 1);
258 /* Set to 3ad */ 259 /* Set to 3ad */
259 s3c2410_gpio_setpin(S3C2410_GPC(0), 1); 260 gpio_direction_output(S3C2410_GPC(0), 1);
260 } 261 }
261} 262}
262 263
@@ -333,6 +334,7 @@ static void __init h1940_init(void)
333 gpio_request(S3C2410_GPC(5), "LCD power"); 334 gpio_request(S3C2410_GPC(5), "LCD power");
334 gpio_request(S3C2410_GPC(6), "LCD power"); 335 gpio_request(S3C2410_GPC(6), "LCD power");
335 336
337 gpio_direction_input(S3C2410_GPC(6));
336 338
337 platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); 339 platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices));
338} 340}
diff --git a/arch/arm/mach-s3c2410/mach-n30.c b/arch/arm/mach-s3c2410/mach-n30.c
index 9e2565ad973d..41f299d983eb 100644
--- a/arch/arm/mach-s3c2410/mach-n30.c
+++ b/arch/arm/mach-s3c2410/mach-n30.c
@@ -596,6 +596,9 @@ static void __init n30_init(void)
596 596
597 platform_add_devices(n35_devices, ARRAY_SIZE(n35_devices)); 597 platform_add_devices(n35_devices, ARRAY_SIZE(n35_devices));
598 } 598 }
599
600 WARN_ON(gpio_request(S3C2410_GPB(3), "udc pup"));
601 gpio_direction_output(S3C2410_GPB(3), 0);
599} 602}
600 603
601MACHINE_START(N30, "Acer-N30") 604MACHINE_START(N30, "Acer-N30")
diff --git a/arch/arm/mach-s3c2410/mach-qt2410.c b/arch/arm/mach-s3c2410/mach-qt2410.c
index 92a4ec375d82..d0e87b6e2e0f 100644
--- a/arch/arm/mach-s3c2410/mach-qt2410.c
+++ b/arch/arm/mach-s3c2410/mach-qt2410.c
@@ -58,6 +58,7 @@
58#include <plat/iic.h> 58#include <plat/iic.h>
59 59
60#include <plat/common-smdk.h> 60#include <plat/common-smdk.h>
61#include <plat/gpio-cfg.h>
61#include <plat/devs.h> 62#include <plat/devs.h>
62#include <plat/cpu.h> 63#include <plat/cpu.h>
63#include <plat/pm.h> 64#include <plat/pm.h>
@@ -219,10 +220,10 @@ static void spi_gpio_cs(struct s3c2410_spigpio_info *spi, int cs)
219{ 220{
220 switch (cs) { 221 switch (cs) {
221 case BITBANG_CS_ACTIVE: 222 case BITBANG_CS_ACTIVE:
222 s3c2410_gpio_setpin(S3C2410_GPB(5), 0); 223 gpio_set_value(S3C2410_GPB(5), 0);
223 break; 224 break;
224 case BITBANG_CS_INACTIVE: 225 case BITBANG_CS_INACTIVE:
225 s3c2410_gpio_setpin(S3C2410_GPB(5), 1); 226 gpio_set_value(S3C2410_GPB(5), 1);
226 break; 227 break;
227 } 228 }
228} 229}
@@ -347,13 +348,14 @@ static void __init qt2410_machine_init(void)
347 } 348 }
348 s3c24xx_fb_set_platdata(&qt2410_fb_info); 349 s3c24xx_fb_set_platdata(&qt2410_fb_info);
349 350
350 s3c2410_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPIO_OUTPUT); 351 s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPIO_OUTPUT);
351 s3c2410_gpio_setpin(S3C2410_GPB(0), 1); 352 s3c2410_gpio_setpin(S3C2410_GPB(0), 1);
352 353
353 s3c24xx_udc_set_platdata(&qt2410_udc_cfg); 354 s3c24xx_udc_set_platdata(&qt2410_udc_cfg);
354 s3c_i2c0_set_platdata(NULL); 355 s3c_i2c0_set_platdata(NULL);
355 356
356 s3c2410_gpio_cfgpin(S3C2410_GPB(5), S3C2410_GPIO_OUTPUT); 357 WARN_ON(gpio_request(S3C2410_GPB(5), "spi cs"));
358 gpio_direction_output(S3C2410_GPB(5), 1);
357 359
358 platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices)); 360 platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices));
359 s3c_pm_init(); 361 s3c_pm_init();
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index 9051f0d31123..d540d79dd264 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -357,8 +357,7 @@ static struct clk *vr1000_clocks[] __initdata = {
357 357
358static void vr1000_power_off(void) 358static void vr1000_power_off(void)
359{ 359{
360 s3c2410_gpio_cfgpin(S3C2410_GPB(9), S3C2410_GPIO_OUTPUT); 360 gpio_direction_output(S3C2410_GPB(9), 1);
361 s3c2410_gpio_setpin(S3C2410_GPB(9), 1);
362} 361}
363 362
364static void __init vr1000_map_io(void) 363static void __init vr1000_map_io(void)
@@ -395,6 +394,8 @@ static void __init vr1000_init(void)
395 394
396 nor_simtec_init(); 395 nor_simtec_init();
397 simtec_audio_add(NULL, true, NULL); 396 simtec_audio_add(NULL, true, NULL);
397
398 WARN_ON(gpio_request(S3C2410_GPB(9), "power off"));
398} 399}
399 400
400MACHINE_START(VR1000, "Thorcom-VR1000") 401MACHINE_START(VR1000, "Thorcom-VR1000")
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index 91ba42f688ac..adc90a3c5890 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -16,6 +16,7 @@
16#include <linux/list.h> 16#include <linux/list.h>
17#include <linux/timer.h> 17#include <linux/timer.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/gpio.h>
19#include <linux/clk.h> 20#include <linux/clk.h>
20#include <linux/sysdev.h> 21#include <linux/sysdev.h>
21#include <linux/serial_core.h> 22#include <linux/serial_core.h>
@@ -40,6 +41,10 @@
40#include <plat/clock.h> 41#include <plat/clock.h>
41#include <plat/pll.h> 42#include <plat/pll.h>
42 43
44#include <plat/gpio-core.h>
45#include <plat/gpio-cfg.h>
46#include <plat/gpio-cfg-helpers.h>
47
43/* Initial IO mappings */ 48/* Initial IO mappings */
44 49
45static struct map_desc s3c2410_iodesc[] __initdata = { 50static struct map_desc s3c2410_iodesc[] __initdata = {
@@ -65,6 +70,9 @@ void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
65 70
66void __init s3c2410_map_io(void) 71void __init s3c2410_map_io(void)
67{ 72{
73 s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_1up;
74 s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_1up;
75
68 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc)); 76 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
69} 77}
70 78