diff options
author | Ben Dooks <ben@simtec.co.uk> | 2009-03-19 11:02:37 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2009-05-01 06:39:07 -0400 |
commit | c133c290118bfc99cd7a23b5a00b5252d2be90c8 (patch) | |
tree | e20ede3d5be319add38694b2dbe8355dd8d715db /arch/arm/mach-s3c2410 | |
parent | 023b40cd1018915beb5a519b55ea174683215f16 (diff) |
[ARM] S3C: Make common <plat/dma.h> header
Move the common information from the <mach/dma.h> header into a new
shareable <plat/dma.h> header for re-use on the s3c64xx.
Signed-off-by: Ben Dooks <ben@simtec.co.uk>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c2410')
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/dma.h | 117 |
1 files changed, 3 insertions, 114 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/dma.h b/arch/arm/mach-s3c2410/include/mach/dma.h index 6cefa56e6a1f..2fbabecf4f6e 100644 --- a/arch/arm/mach-s3c2410/include/mach/dma.h +++ b/arch/arm/mach-s3c2410/include/mach/dma.h | |||
@@ -13,6 +13,7 @@ | |||
13 | #ifndef __ASM_ARCH_DMA_H | 13 | #ifndef __ASM_ARCH_DMA_H |
14 | #define __ASM_ARCH_DMA_H __FILE__ | 14 | #define __ASM_ARCH_DMA_H __FILE__ |
15 | 15 | ||
16 | #include <plat/dma.h> | ||
16 | #include <linux/sysdev.h> | 17 | #include <linux/sysdev.h> |
17 | #include <mach/hardware.h> | 18 | #include <mach/hardware.h> |
18 | 19 | ||
@@ -103,32 +104,6 @@ enum s3c2410_dma_loadst { | |||
103 | S3C2410_DMALOAD_1LOADED_1RUNNING, | 104 | S3C2410_DMALOAD_1LOADED_1RUNNING, |
104 | }; | 105 | }; |
105 | 106 | ||
106 | enum s3c2410_dma_buffresult { | ||
107 | S3C2410_RES_OK, | ||
108 | S3C2410_RES_ERR, | ||
109 | S3C2410_RES_ABORT | ||
110 | }; | ||
111 | |||
112 | enum s3c2410_dmasrc { | ||
113 | S3C2410_DMASRC_HW, /* source is memory */ | ||
114 | S3C2410_DMASRC_MEM /* source is hardware */ | ||
115 | }; | ||
116 | |||
117 | /* enum s3c2410_chan_op | ||
118 | * | ||
119 | * operation codes passed to the DMA code by the user, and also used | ||
120 | * to inform the current channel owner of any changes to the system state | ||
121 | */ | ||
122 | |||
123 | enum s3c2410_chan_op { | ||
124 | S3C2410_DMAOP_START, | ||
125 | S3C2410_DMAOP_STOP, | ||
126 | S3C2410_DMAOP_PAUSE, | ||
127 | S3C2410_DMAOP_RESUME, | ||
128 | S3C2410_DMAOP_FLUSH, | ||
129 | S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ | ||
130 | S3C2410_DMAOP_STARTED, /* indicate channel started */ | ||
131 | }; | ||
132 | 107 | ||
133 | /* flags */ | 108 | /* flags */ |
134 | 109 | ||
@@ -138,17 +113,14 @@ enum s3c2410_chan_op { | |||
138 | 113 | ||
139 | /* dma buffer */ | 114 | /* dma buffer */ |
140 | 115 | ||
141 | struct s3c2410_dma_client { | 116 | struct s3c2410_dma_buf; |
142 | char *name; | ||
143 | }; | ||
144 | 117 | ||
145 | /* s3c2410_dma_buf_s | 118 | /* s3c2410_dma_buf |
146 | * | 119 | * |
147 | * internally used buffer structure to describe a queued or running | 120 | * internally used buffer structure to describe a queued or running |
148 | * buffer. | 121 | * buffer. |
149 | */ | 122 | */ |
150 | 123 | ||
151 | struct s3c2410_dma_buf; | ||
152 | struct s3c2410_dma_buf { | 124 | struct s3c2410_dma_buf { |
153 | struct s3c2410_dma_buf *next; | 125 | struct s3c2410_dma_buf *next; |
154 | int magic; /* magic */ | 126 | int magic; /* magic */ |
@@ -160,20 +132,6 @@ struct s3c2410_dma_buf { | |||
160 | 132 | ||
161 | /* [1] is this updated for both recv/send modes? */ | 133 | /* [1] is this updated for both recv/send modes? */ |
162 | 134 | ||
163 | struct s3c2410_dma_chan; | ||
164 | |||
165 | /* s3c2410_dma_cbfn_t | ||
166 | * | ||
167 | * buffer callback routine type | ||
168 | */ | ||
169 | |||
170 | typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *, | ||
171 | void *buf, int size, | ||
172 | enum s3c2410_dma_buffresult result); | ||
173 | |||
174 | typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *, | ||
175 | enum s3c2410_chan_op ); | ||
176 | |||
177 | struct s3c2410_dma_stats { | 135 | struct s3c2410_dma_stats { |
178 | unsigned long loads; | 136 | unsigned long loads; |
179 | unsigned long timeout_longest; | 137 | unsigned long timeout_longest; |
@@ -241,73 +199,4 @@ extern struct s3c2410_dma_chan s3c2410_chans[]; | |||
241 | /* note, we don't really use dma_device_t at the moment */ | 199 | /* note, we don't really use dma_device_t at the moment */ |
242 | typedef unsigned long dma_device_t; | 200 | typedef unsigned long dma_device_t; |
243 | 201 | ||
244 | /* functions --------------------------------------------------------------- */ | ||
245 | |||
246 | /* s3c2410_dma_request | ||
247 | * | ||
248 | * request a dma channel exclusivley | ||
249 | */ | ||
250 | |||
251 | extern int s3c2410_dma_request(unsigned int channel, | ||
252 | struct s3c2410_dma_client *, void *dev); | ||
253 | |||
254 | |||
255 | /* s3c2410_dma_ctrl | ||
256 | * | ||
257 | * change the state of the dma channel | ||
258 | */ | ||
259 | |||
260 | extern int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op); | ||
261 | |||
262 | /* s3c2410_dma_setflags | ||
263 | * | ||
264 | * set the channel's flags to a given state | ||
265 | */ | ||
266 | |||
267 | extern int s3c2410_dma_setflags(unsigned int channel, | ||
268 | unsigned int flags); | ||
269 | |||
270 | /* s3c2410_dma_free | ||
271 | * | ||
272 | * free the dma channel (will also abort any outstanding operations) | ||
273 | */ | ||
274 | |||
275 | extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *); | ||
276 | |||
277 | /* s3c2410_dma_enqueue | ||
278 | * | ||
279 | * place the given buffer onto the queue of operations for the channel. | ||
280 | * The buffer must be allocated from dma coherent memory, or the Dcache/WB | ||
281 | * drained before the buffer is given to the DMA system. | ||
282 | */ | ||
283 | |||
284 | extern int s3c2410_dma_enqueue(unsigned int channel, void *id, | ||
285 | dma_addr_t data, int size); | ||
286 | |||
287 | /* s3c2410_dma_config | ||
288 | * | ||
289 | * configure the dma channel | ||
290 | */ | ||
291 | |||
292 | extern int s3c2410_dma_config(unsigned int channel, int xferunit); | ||
293 | |||
294 | /* s3c2410_dma_devconfig | ||
295 | * | ||
296 | * configure the device we're talking to | ||
297 | */ | ||
298 | |||
299 | extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, | ||
300 | unsigned long devaddr); | ||
301 | |||
302 | /* s3c2410_dma_getposition | ||
303 | * | ||
304 | * get the position that the dma transfer is currently at | ||
305 | */ | ||
306 | |||
307 | extern int s3c2410_dma_getposition(unsigned int channel, | ||
308 | dma_addr_t *src, dma_addr_t *dest); | ||
309 | |||
310 | extern int s3c2410_dma_set_opfn(unsigned int, s3c2410_dma_opfn_t rtn); | ||
311 | extern int s3c2410_dma_set_buffdone_fn(unsigned int, s3c2410_dma_cbfn_t rtn); | ||
312 | |||
313 | #endif /* __ASM_ARCH_DMA_H */ | 202 | #endif /* __ASM_ARCH_DMA_H */ |