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authorBen Dooks <ben-linux@fluff.org>2009-08-14 10:23:34 -0400
committerBen Dooks <ben-linux@fluff.org>2009-08-14 10:23:34 -0400
commit0fbdd270078a3e3ce537a2fb6ffc8a9b2427500c (patch)
treeb75f47e26372ffa2374b744a6991144032eea6ef /arch/arm/mach-s3c2410
parent69e372896791c2e43949b32d4cbe8a714961d3d7 (diff)
parenta2c195fdde20772a90ee98ce3523dcfbda49eee6 (diff)
Merge branch 'next-s3c24xx' into next-s3c
Diffstat (limited to 'arch/arm/mach-s3c2410')
-rw-r--r--arch/arm/mach-s3c2410/include/mach/irqs.h6
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-gpio.h4
-rw-r--r--arch/arm/mach-s3c2410/include/mach/spi.h3
3 files changed, 12 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/irqs.h b/arch/arm/mach-s3c2410/include/mach/irqs.h
index 2a2384ffa7b1..6c12c6312ad8 100644
--- a/arch/arm/mach-s3c2410/include/mach/irqs.h
+++ b/arch/arm/mach-s3c2410/include/mach/irqs.h
@@ -164,6 +164,12 @@
164#define IRQ_S3CUART_TX3 IRQ_S3C2443_TX3 164#define IRQ_S3CUART_TX3 IRQ_S3C2443_TX3
165#define IRQ_S3CUART_ERR3 IRQ_S3C2443_ERR3 165#define IRQ_S3CUART_ERR3 IRQ_S3C2443_ERR3
166 166
167#ifdef CONFIG_CPU_S3C2440
168#define IRQ_S3C244x_AC97 IRQ_S3C2440_AC97
169#else
170#define IRQ_S3C244x_AC97 IRQ_S3C2443_AC97
171#endif
172
167/* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */ 173/* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */
168#define FIQ_START IRQ_EINT0 174#define FIQ_START IRQ_EINT0
169 175
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
index b278d0c45ccf..f6e8eec879c8 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
@@ -328,13 +328,15 @@
328 328
329#define S3C2410_GPD8_VD16 (0x02 << 16) 329#define S3C2410_GPD8_VD16 (0x02 << 16)
330#define S3C2400_GPD8_TOUT3 (0x02 << 16) 330#define S3C2400_GPD8_TOUT3 (0x02 << 16)
331#define S3C2440_GPD8_SPIMISO1 (0x03 << 16)
331 332
332#define S3C2410_GPD9_VD17 (0x02 << 18) 333#define S3C2410_GPD9_VD17 (0x02 << 18)
333#define S3C2400_GPD9_TCLK0 (0x02 << 18) 334#define S3C2400_GPD9_TCLK0 (0x02 << 18)
334#define S3C2410_GPD9_MASK (0x03 << 18) 335#define S3C2440_GPD9_SPIMOSI1 (0x03 << 18)
335 336
336#define S3C2410_GPD10_VD18 (0x02 << 20) 337#define S3C2410_GPD10_VD18 (0x02 << 20)
337#define S3C2400_GPD10_nWAIT (0x02 << 20) 338#define S3C2400_GPD10_nWAIT (0x02 << 20)
339#define S3C2440_GPD10_SPICLK1 (0x03 << 20)
338 340
339#define S3C2410_GPD11_VD19 (0x02 << 22) 341#define S3C2410_GPD11_VD19 (0x02 << 22)
340 342
diff --git a/arch/arm/mach-s3c2410/include/mach/spi.h b/arch/arm/mach-s3c2410/include/mach/spi.h
index 1d300fb112b1..193b39d654ed 100644
--- a/arch/arm/mach-s3c2410/include/mach/spi.h
+++ b/arch/arm/mach-s3c2410/include/mach/spi.h
@@ -30,4 +30,7 @@ extern void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi,
30extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, 30extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi,
31 int enable); 31 int enable);
32 32
33extern void s3c24xx_spi_gpiocfg_bus1_gpd8_9_10(struct s3c2410_spi_info *spi,
34 int enable);
35
33#endif /* __ASM_ARCH_SPI_H */ 36#endif /* __ASM_ARCH_SPI_H */