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author | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-01-31 12:24:00 -0500 |
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committer | James Bottomley <jejb@mulgrave.il.steeleye.com> | 2007-01-31 12:24:00 -0500 |
commit | 30716e07ef511ec7525c07eb1e8060ba8943c2a2 (patch) | |
tree | eb6a47cae63d3587fa773cc5a16781eaa2c7810b /arch/arm/mach-s3c2410 | |
parent | 03c79cc56e4497cbd09d74a73c1bd0d1d9a8a16c (diff) | |
parent | f56df2f4db6e4af87fb8e941cff69f4501a111df (diff) |
Merge branch 'linus'
Diffstat (limited to 'arch/arm/mach-s3c2410')
-rw-r--r-- | arch/arm/mach-s3c2410/gpio.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/pm.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/s3c2412-dma.c | 4 |
3 files changed, 13 insertions, 10 deletions
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c index ba346546150b..f6fb215bb48c 100644 --- a/arch/arm/mach-s3c2410/gpio.c +++ b/arch/arm/mach-s3c2410/gpio.c | |||
@@ -57,6 +57,7 @@ void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function) | |||
57 | case S3C2410_GPIO_SFN2: | 57 | case S3C2410_GPIO_SFN2: |
58 | case S3C2410_GPIO_SFN3: | 58 | case S3C2410_GPIO_SFN3: |
59 | if (pin < S3C2410_GPIO_BANKB) { | 59 | if (pin < S3C2410_GPIO_BANKB) { |
60 | function -= 1; | ||
60 | function &= 1; | 61 | function &= 1; |
61 | function <<= S3C2410_GPIO_OFFSET(pin); | 62 | function <<= S3C2410_GPIO_OFFSET(pin); |
62 | } else { | 63 | } else { |
@@ -83,15 +84,18 @@ EXPORT_SYMBOL(s3c2410_gpio_cfgpin); | |||
83 | unsigned int s3c2410_gpio_getcfg(unsigned int pin) | 84 | unsigned int s3c2410_gpio_getcfg(unsigned int pin) |
84 | { | 85 | { |
85 | void __iomem *base = S3C24XX_GPIO_BASE(pin); | 86 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
86 | unsigned long mask; | 87 | unsigned long val = __raw_readl(base); |
87 | 88 | ||
88 | if (pin < S3C2410_GPIO_BANKB) { | 89 | if (pin < S3C2410_GPIO_BANKB) { |
89 | mask = 1 << S3C2410_GPIO_OFFSET(pin); | 90 | val >>= S3C2410_GPIO_OFFSET(pin); |
91 | val &= 1; | ||
92 | val += 1; | ||
90 | } else { | 93 | } else { |
91 | mask = 3 << S3C2410_GPIO_OFFSET(pin)*2; | 94 | val >>= S3C2410_GPIO_OFFSET(pin)*2; |
95 | val &= 3; | ||
92 | } | 96 | } |
93 | 97 | ||
94 | return __raw_readl(base) & mask; | 98 | return val | S3C2410_GPIO_INPUT; |
95 | } | 99 | } |
96 | 100 | ||
97 | EXPORT_SYMBOL(s3c2410_gpio_getcfg); | 101 | EXPORT_SYMBOL(s3c2410_gpio_getcfg); |
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c index 00834097eb82..ebf294dd31da 100644 --- a/arch/arm/mach-s3c2410/pm.c +++ b/arch/arm/mach-s3c2410/pm.c | |||
@@ -451,15 +451,14 @@ static void s3c2410_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) | |||
451 | irqstate = s3c_irqwake_eintmask & (1L<<irqoffs); | 451 | irqstate = s3c_irqwake_eintmask & (1L<<irqoffs); |
452 | 452 | ||
453 | pinstate = s3c2410_gpio_getcfg(pin); | 453 | pinstate = s3c2410_gpio_getcfg(pin); |
454 | pinstate >>= S3C2410_GPIO_OFFSET(pin)*2; | ||
455 | 454 | ||
456 | if (!irqstate) { | 455 | if (!irqstate) { |
457 | if (pinstate == 0x02) | 456 | if (pinstate == S3C2410_GPIO_IRQ) |
458 | DBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin); | 457 | DBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin); |
459 | } else { | 458 | } else { |
460 | if (pinstate == 0x02) { | 459 | if (pinstate == S3C2410_GPIO_IRQ) { |
461 | DBG("Disabling IRQ %d (pin %d)\n", irq, pin); | 460 | DBG("Disabling IRQ %d (pin %d)\n", irq, pin); |
462 | s3c2410_gpio_cfgpin(pin, 0x00); | 461 | s3c2410_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); |
463 | } | 462 | } |
464 | } | 463 | } |
465 | } | 464 | } |
diff --git a/arch/arm/mach-s3c2410/s3c2412-dma.c b/arch/arm/mach-s3c2410/s3c2412-dma.c index fe71a8fdb87c..138f726ac6bf 100644 --- a/arch/arm/mach-s3c2410/s3c2412-dma.c +++ b/arch/arm/mach-s3c2410/s3c2412-dma.c | |||
@@ -133,8 +133,8 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = { | |||
133 | static void s3c2412_dma_select(struct s3c2410_dma_chan *chan, | 133 | static void s3c2412_dma_select(struct s3c2410_dma_chan *chan, |
134 | struct s3c24xx_dma_map *map) | 134 | struct s3c24xx_dma_map *map) |
135 | { | 135 | { |
136 | writel(chan->regs + S3C2412_DMA_DMAREQSEL, | 136 | writel(map->channels[0] | S3C2412_DMAREQSEL_HW, |
137 | map->channels[0] | S3C2412_DMAREQSEL_HW); | 137 | chan->regs + S3C2412_DMA_DMAREQSEL); |
138 | } | 138 | } |
139 | 139 | ||
140 | static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { | 140 | static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { |