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authorBen Dooks <ben-linux@fluff.org>2010-05-05 22:23:35 -0400
committerBen Dooks <ben-linux@fluff.org>2010-05-05 22:23:35 -0400
commit9772b7586efb189ac2dcac1d6f7d09c6d879ac64 (patch)
tree4264b7f024582de31b34bfa45445b6b53380ab7e /arch/arm/mach-s3c2410
parent31da46d9f11ccdb11d7f2f07421f5cccb64fbbd6 (diff)
ARM: S3C24XX: Remove S3C2410_GPJ numbering
Remove the old S3C2410_GPJ as we will be moving to the new gpiolib based driver code and these numbers will become invalid. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c2410')
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-gpioj.h19
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h b/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h
index de463bc17b5d..502575711246 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpioj.h
@@ -22,81 +22,62 @@
22 * pull up works like all other ports. 22 * pull up works like all other ports.
23*/ 23*/
24 24
25#define S3C2440_GPIO_BANKJ (416)
26
27#define S3C2413_GPJCON S3C2410_GPIOREG(0x80) 25#define S3C2413_GPJCON S3C2410_GPIOREG(0x80)
28#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84) 26#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84)
29#define S3C2413_GPJUP S3C2410_GPIOREG(0x88) 27#define S3C2413_GPJUP S3C2410_GPIOREG(0x88)
30#define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C) 28#define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C)
31 29
32#define S3C2440_GPJ0 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 0)
33#define S3C2440_GPJ0_INP (0x00 << 0) 30#define S3C2440_GPJ0_INP (0x00 << 0)
34#define S3C2440_GPJ0_OUTP (0x01 << 0) 31#define S3C2440_GPJ0_OUTP (0x01 << 0)
35#define S3C2440_GPJ0_CAMDATA0 (0x02 << 0) 32#define S3C2440_GPJ0_CAMDATA0 (0x02 << 0)
36 33
37#define S3C2440_GPJ1 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 1)
38#define S3C2440_GPJ1_INP (0x00 << 2) 34#define S3C2440_GPJ1_INP (0x00 << 2)
39#define S3C2440_GPJ1_OUTP (0x01 << 2) 35#define S3C2440_GPJ1_OUTP (0x01 << 2)
40#define S3C2440_GPJ1_CAMDATA1 (0x02 << 2) 36#define S3C2440_GPJ1_CAMDATA1 (0x02 << 2)
41 37
42#define S3C2440_GPJ2 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 2)
43#define S3C2440_GPJ2_INP (0x00 << 4) 38#define S3C2440_GPJ2_INP (0x00 << 4)
44#define S3C2440_GPJ2_OUTP (0x01 << 4) 39#define S3C2440_GPJ2_OUTP (0x01 << 4)
45#define S3C2440_GPJ2_CAMDATA2 (0x02 << 4) 40#define S3C2440_GPJ2_CAMDATA2 (0x02 << 4)
46 41
47#define S3C2440_GPJ3 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 3)
48#define S3C2440_GPJ3_INP (0x00 << 6) 42#define S3C2440_GPJ3_INP (0x00 << 6)
49#define S3C2440_GPJ3_OUTP (0x01 << 6) 43#define S3C2440_GPJ3_OUTP (0x01 << 6)
50#define S3C2440_GPJ3_CAMDATA3 (0x02 << 6) 44#define S3C2440_GPJ3_CAMDATA3 (0x02 << 6)
51 45
52#define S3C2440_GPJ4 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 4)
53#define S3C2440_GPJ4_INP (0x00 << 8) 46#define S3C2440_GPJ4_INP (0x00 << 8)
54#define S3C2440_GPJ4_OUTP (0x01 << 8) 47#define S3C2440_GPJ4_OUTP (0x01 << 8)
55#define S3C2440_GPJ4_CAMDATA4 (0x02 << 8) 48#define S3C2440_GPJ4_CAMDATA4 (0x02 << 8)
56 49
57#define S3C2440_GPJ5 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 5)
58#define S3C2440_GPJ5_INP (0x00 << 10) 50#define S3C2440_GPJ5_INP (0x00 << 10)
59#define S3C2440_GPJ5_OUTP (0x01 << 10) 51#define S3C2440_GPJ5_OUTP (0x01 << 10)
60#define S3C2440_GPJ5_CAMDATA5 (0x02 << 10) 52#define S3C2440_GPJ5_CAMDATA5 (0x02 << 10)
61 53
62#define S3C2440_GPJ6 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 6)
63#define S3C2440_GPJ6_INP (0x00 << 12) 54#define S3C2440_GPJ6_INP (0x00 << 12)
64#define S3C2440_GPJ6_OUTP (0x01 << 12) 55#define S3C2440_GPJ6_OUTP (0x01 << 12)
65#define S3C2440_GPJ6_CAMDATA6 (0x02 << 12) 56#define S3C2440_GPJ6_CAMDATA6 (0x02 << 12)
66 57
67#define S3C2440_GPJ7 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 7)
68#define S3C2440_GPJ7_INP (0x00 << 14) 58#define S3C2440_GPJ7_INP (0x00 << 14)
69#define S3C2440_GPJ7_OUTP (0x01 << 14) 59#define S3C2440_GPJ7_OUTP (0x01 << 14)
70#define S3C2440_GPJ7_CAMDATA7 (0x02 << 14) 60#define S3C2440_GPJ7_CAMDATA7 (0x02 << 14)
71 61
72#define S3C2440_GPJ8 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 8)
73#define S3C2440_GPJ8_INP (0x00 << 16) 62#define S3C2440_GPJ8_INP (0x00 << 16)
74#define S3C2440_GPJ8_OUTP (0x01 << 16) 63#define S3C2440_GPJ8_OUTP (0x01 << 16)
75#define S3C2440_GPJ8_CAMPCLK (0x02 << 16) 64#define S3C2440_GPJ8_CAMPCLK (0x02 << 16)
76 65
77#define S3C2440_GPJ9 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 9)
78#define S3C2440_GPJ9_INP (0x00 << 18) 66#define S3C2440_GPJ9_INP (0x00 << 18)
79#define S3C2440_GPJ9_OUTP (0x01 << 18) 67#define S3C2440_GPJ9_OUTP (0x01 << 18)
80#define S3C2440_GPJ9_CAMVSYNC (0x02 << 18) 68#define S3C2440_GPJ9_CAMVSYNC (0x02 << 18)
81 69
82#define S3C2440_GPJ10 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 10)
83#define S3C2440_GPJ10_INP (0x00 << 20) 70#define S3C2440_GPJ10_INP (0x00 << 20)
84#define S3C2440_GPJ10_OUTP (0x01 << 20) 71#define S3C2440_GPJ10_OUTP (0x01 << 20)
85#define S3C2440_GPJ10_CAMHREF (0x02 << 20) 72#define S3C2440_GPJ10_CAMHREF (0x02 << 20)
86 73
87#define S3C2440_GPJ11 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 11)
88#define S3C2440_GPJ11_INP (0x00 << 22) 74#define S3C2440_GPJ11_INP (0x00 << 22)
89#define S3C2440_GPJ11_OUTP (0x01 << 22) 75#define S3C2440_GPJ11_OUTP (0x01 << 22)
90#define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22) 76#define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22)
91 77
92#define S3C2440_GPJ12 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 12)
93#define S3C2440_GPJ12_INP (0x00 << 24) 78#define S3C2440_GPJ12_INP (0x00 << 24)
94#define S3C2440_GPJ12_OUTP (0x01 << 24) 79#define S3C2440_GPJ12_OUTP (0x01 << 24)
95#define S3C2440_GPJ12_CAMRESET (0x02 << 24) 80#define S3C2440_GPJ12_CAMRESET (0x02 << 24)
96 81
97#define S3C2443_GPJ13 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 13)
98#define S3C2443_GPJ14 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 14)
99#define S3C2443_GPJ15 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 15)
100
101#endif /* __ASM_ARCH_REGS_GPIOJ_H */ 82#endif /* __ASM_ARCH_REGS_GPIOJ_H */
102 83