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authorHeiko Stuebner <heiko@sntech.de>2011-08-18 07:16:56 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-09-16 02:39:43 -0400
commitead841c2ed986f7cc6a4830e816b0f633f95cf7f (patch)
tree867230bdc459dea547c2ceb39fba6c72ad737481 /arch/arm/mach-s3c2410
parent93ee7a9340d64f20295aacc3fb6a22b759323280 (diff)
ARM: S3C24XX: Remove hw_addr from s3c24xx dma channel declarations
According to commit c4806174c516d26bf4a72db1789cfc96e4950d07 (ARM: S3C2412: DMA: Remove I2S FIFO address) the S3C DMA API does not make use of hw_addr.to/from declared for some of the channels in mach-s3c24XX/dma.c Grepping through the kernel also did non reveal any new users of these properties since the mentioned commit. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c2410')
-rw-r--r--arch/arm/mach-s3c2410/dma.c14
1 files changed, 0 insertions, 14 deletions
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 0d8e043804c2..dbe43df8cfec 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -47,38 +47,26 @@ static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
47 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID, 47 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
48 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, 48 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
49 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, 49 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
50 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
51 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
52 }, 50 },
53 [DMACH_SPI0] = { 51 [DMACH_SPI0] = {
54 .name = "spi0", 52 .name = "spi0",
55 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, 53 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
56 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
57 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
58 }, 54 },
59 [DMACH_SPI1] = { 55 [DMACH_SPI1] = {
60 .name = "spi1", 56 .name = "spi1",
61 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, 57 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
62 .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
63 .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
64 }, 58 },
65 [DMACH_UART0] = { 59 [DMACH_UART0] = {
66 .name = "uart0", 60 .name = "uart0",
67 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, 61 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
68 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
69 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
70 }, 62 },
71 [DMACH_UART1] = { 63 [DMACH_UART1] = {
72 .name = "uart1", 64 .name = "uart1",
73 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, 65 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
74 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
75 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
76 }, 66 },
77 [DMACH_UART2] = { 67 [DMACH_UART2] = {
78 .name = "uart2", 68 .name = "uart2",
79 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, 69 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
80 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
81 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
82 }, 70 },
83 [DMACH_TIMER] = { 71 [DMACH_TIMER] = {
84 .name = "timer", 72 .name = "timer",
@@ -90,12 +78,10 @@ static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
90 .name = "i2s-sdi", 78 .name = "i2s-sdi",
91 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, 79 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
92 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, 80 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
93 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
94 }, 81 },
95 [DMACH_I2S_OUT] = { 82 [DMACH_I2S_OUT] = {
96 .name = "i2s-sdo", 83 .name = "i2s-sdo",
97 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, 84 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
98 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
99 }, 85 },
100 [DMACH_USB_EP1] = { 86 [DMACH_USB_EP1] = {
101 .name = "usb-ep1", 87 .name = "usb-ep1",