diff options
author | Ben Dooks <ben-linux@fluff.org> | 2006-09-15 19:04:23 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-25 05:25:21 -0400 |
commit | 58095d7f39edc919cd3c63c6109ad282e7085da1 (patch) | |
tree | d0e7f7ef1a5a4b68dafbbc8e83eb57abd581bb83 /arch/arm/mach-s3c2410/sleep.S | |
parent | 1e582fc73781da47eddd90c75bf97f191e4f450f (diff) |
[ARM] 3802/1: S3C24XX: PM tidy up cache flushing
Change to using flush_cache_all() in pm.c and
also remove the need to flush the cache in the
PM code.
This changes the sleep.S code to have an entry
to store the registers for resume, and then a
second entry (after the caches are cleaned)
to do the suspend and resume.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2410/sleep.S')
-rw-r--r-- | arch/arm/mach-s3c2410/sleep.S | 31 |
1 files changed, 22 insertions, 9 deletions
diff --git a/arch/arm/mach-s3c2410/sleep.S b/arch/arm/mach-s3c2410/sleep.S index a7561a79fc82..e977aa1ffe18 100644 --- a/arch/arm/mach-s3c2410/sleep.S +++ b/arch/arm/mach-s3c2410/sleep.S | |||
@@ -41,15 +41,25 @@ | |||
41 | 41 | ||
42 | .text | 42 | .text |
43 | 43 | ||
44 | /* s3c2410_cpu_suspend | 44 | /* s3c2410_cpu_save |
45 | * | 45 | * |
46 | * put the cpu into sleep mode | 46 | * save enough of the CPU state to allow us to re-start |
47 | * pm.c code. as we store items like the sp/lr, we will | ||
48 | * end up returning from this function when the cpu resumes | ||
49 | * so the return value is set to mark this. | ||
50 | * | ||
51 | * This arangement means we avoid having to flush the cache | ||
52 | * from this code. | ||
47 | * | 53 | * |
48 | * entry: | 54 | * entry: |
49 | * r0 = sleep save block | 55 | * r0 = pointer to save block |
56 | * | ||
57 | * exit: | ||
58 | * r0 = 0 => we stored everything | ||
59 | * 1 => resumed from sleep | ||
50 | */ | 60 | */ |
51 | 61 | ||
52 | ENTRY(s3c2410_cpu_suspend) | 62 | ENTRY(s3c2410_cpu_save) |
53 | stmfd sp!, { r4 - r12, lr } | 63 | stmfd sp!, { r4 - r12, lr } |
54 | 64 | ||
55 | @@ store co-processor registers | 65 | @@ store co-processor registers |
@@ -62,13 +72,15 @@ ENTRY(s3c2410_cpu_suspend) | |||
62 | 72 | ||
63 | stmia r0, { r4 - r13 } | 73 | stmia r0, { r4 - r13 } |
64 | 74 | ||
65 | @@ flush the caches to ensure everything is back out to | 75 | mov r0, #0 |
66 | @@ SDRAM before the core powers down | 76 | ldmfd sp, { r4 - r12, pc } |
67 | 77 | ||
68 | #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH | 78 | /* s3c2410_cpu_suspend |
69 | bl arm920_flush_kern_cache_all | 79 | * |
70 | #endif | 80 | * put the cpu into sleep mode |
81 | */ | ||
71 | 82 | ||
83 | ENTRY(s3c2410_cpu_suspend) | ||
72 | @@ prepare cpu to sleep | 84 | @@ prepare cpu to sleep |
73 | 85 | ||
74 | ldr r4, =S3C2410_REFRESH | 86 | ldr r4, =S3C2410_REFRESH |
@@ -100,6 +112,7 @@ s3c2410_do_sleep: | |||
100 | @@ turned on, this restores the last bits from the | 112 | @@ turned on, this restores the last bits from the |
101 | @@ stack | 113 | @@ stack |
102 | resume_with_mmu: | 114 | resume_with_mmu: |
115 | mov r0, #1 | ||
103 | ldmfd sp!, { r4 - r12, pc } | 116 | ldmfd sp!, { r4 - r12, pc } |
104 | 117 | ||
105 | .ltorg | 118 | .ltorg |