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authorBen Dooks <ben-linux@fluff.org>2005-07-26 14:20:27 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-07-26 14:20:27 -0400
commit7fcc113c3021a42db90e1ad27a7bec267b6e13e3 (patch)
tree6d1f89bd63114d493d1546a503d4c60e947a8a1b /arch/arm/mach-s3c2410/s3c2440-irq.c
parent5730b7d6529e6e894ee3c2e1c68125c0532ad394 (diff)
[PATCH] ARM: 2829/1: S3C2410 - split s3c2440 irq specifics from core irq.c
Patch from Ben Dooks Remove the need for the #ifdefs and place the IRQ handling code for the s3c2440 into a new file, which is only compiled when the s3c2440 cpu support is enabled. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2410/s3c2440-irq.c')
-rw-r--r--arch/arm/mach-s3c2410/s3c2440-irq.c207
1 files changed, 207 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/s3c2440-irq.c b/arch/arm/mach-s3c2410/s3c2440-irq.c
new file mode 100644
index 000000000000..7cb9912242a3
--- /dev/null
+++ b/arch/arm/mach-s3c2410/s3c2440-irq.c
@@ -0,0 +1,207 @@
1/* linux/arch/arm/mach-s3c2410/s3c2440-irq.c
2 *
3 * Copyright (c) 2003,2004 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 * Changelog:
21 * 25-Jul-2005 BJD Split from irq.c
22 *
23*/
24
25#include <linux/init.h>
26#include <linux/module.h>
27#include <linux/interrupt.h>
28#include <linux/ioport.h>
29#include <linux/ptrace.h>
30#include <linux/sysdev.h>
31
32#include <asm/hardware.h>
33#include <asm/irq.h>
34#include <asm/io.h>
35
36#include <asm/mach/irq.h>
37
38#include <asm/arch/regs-irq.h>
39#include <asm/arch/regs-gpio.h>
40
41#include "cpu.h"
42#include "pm.h"
43#include "irq.h"
44
45/* WDT/AC97 */
46
47static void s3c_irq_demux_wdtac97(unsigned int irq,
48 struct irqdesc *desc,
49 struct pt_regs *regs)
50{
51 unsigned int subsrc, submsk;
52 struct irqdesc *mydesc;
53
54 /* read the current pending interrupts, and the mask
55 * for what it is available */
56
57 subsrc = __raw_readl(S3C2410_SUBSRCPND);
58 submsk = __raw_readl(S3C2410_INTSUBMSK);
59
60 subsrc &= ~submsk;
61 subsrc >>= 13;
62 subsrc &= 3;
63
64 if (subsrc != 0) {
65 if (subsrc & 1) {
66 mydesc = irq_desc + IRQ_S3C2440_WDT;
67 mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
68 }
69 if (subsrc & 2) {
70 mydesc = irq_desc + IRQ_S3C2440_AC97;
71 mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
72 }
73 }
74}
75
76
77#define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
78
79static void
80s3c_irq_wdtac97_mask(unsigned int irqno)
81{
82 s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<13);
83}
84
85static void
86s3c_irq_wdtac97_unmask(unsigned int irqno)
87{
88 s3c_irqsub_unmask(irqno, INTMSK_WDT);
89}
90
91static void
92s3c_irq_wdtac97_ack(unsigned int irqno)
93{
94 s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
95}
96
97static struct irqchip s3c_irq_wdtac97 = {
98 .mask = s3c_irq_wdtac97_mask,
99 .unmask = s3c_irq_wdtac97_unmask,
100 .ack = s3c_irq_wdtac97_ack,
101};
102
103/* camera irq */
104
105static void s3c_irq_demux_cam(unsigned int irq,
106 struct irqdesc *desc,
107 struct pt_regs *regs)
108{
109 unsigned int subsrc, submsk;
110 struct irqdesc *mydesc;
111
112 /* read the current pending interrupts, and the mask
113 * for what it is available */
114
115 subsrc = __raw_readl(S3C2410_SUBSRCPND);
116 submsk = __raw_readl(S3C2410_INTSUBMSK);
117
118 subsrc &= ~submsk;
119 subsrc >>= 11;
120 subsrc &= 3;
121
122 if (subsrc != 0) {
123 if (subsrc & 1) {
124 mydesc = irq_desc + IRQ_S3C2440_CAM_C;
125 mydesc->handle( IRQ_S3C2440_WDT, mydesc, regs);
126 }
127 if (subsrc & 2) {
128 mydesc = irq_desc + IRQ_S3C2440_CAM_P;
129 mydesc->handle(IRQ_S3C2440_AC97, mydesc, regs);
130 }
131 }
132}
133
134#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
135
136static void
137s3c_irq_cam_mask(unsigned int irqno)
138{
139 s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
140}
141
142static void
143s3c_irq_cam_unmask(unsigned int irqno)
144{
145 s3c_irqsub_unmask(irqno, INTMSK_CAM);
146}
147
148static void
149s3c_irq_cam_ack(unsigned int irqno)
150{
151 s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
152}
153
154static struct irqchip s3c_irq_cam = {
155 .mask = s3c_irq_cam_mask,
156 .unmask = s3c_irq_cam_unmask,
157 .ack = s3c_irq_cam_ack,
158};
159
160static int s3c2440_irq_add(struct sys_device *sysdev)
161{
162 unsigned int irqno;
163
164 printk("S3C2440: IRQ Support\n");
165
166 set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip);
167 set_irq_handler(IRQ_NFCON, do_level_IRQ);
168 set_irq_flags(IRQ_NFCON, IRQF_VALID);
169
170 /* add new chained handler for wdt, ac7 */
171
172 set_irq_chip(IRQ_WDT, &s3c_irq_level_chip);
173 set_irq_handler(IRQ_WDT, do_level_IRQ);
174 set_irq_chained_handler(IRQ_WDT, s3c_irq_demux_wdtac97);
175
176 for (irqno = IRQ_S3C2440_WDT; irqno <= IRQ_S3C2440_AC97; irqno++) {
177 set_irq_chip(irqno, &s3c_irq_wdtac97);
178 set_irq_handler(irqno, do_level_IRQ);
179 set_irq_flags(irqno, IRQF_VALID);
180 }
181
182 /* add chained handler for camera */
183
184 set_irq_chip(IRQ_CAM, &s3c_irq_level_chip);
185 set_irq_handler(IRQ_CAM, do_level_IRQ);
186 set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam);
187
188 for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) {
189 set_irq_chip(irqno, &s3c_irq_cam);
190 set_irq_handler(irqno, do_level_IRQ);
191 set_irq_flags(irqno, IRQF_VALID);
192 }
193
194 return 0;
195}
196
197static struct sysdev_driver s3c2440_irq_driver = {
198 .add = s3c2440_irq_add,
199};
200
201static int s3c24xx_irq_driver(void)
202{
203 return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver);
204}
205
206arch_initcall(s3c24xx_irq_driver);
207