diff options
author | Krzysztof Helt <krzysztof.h1@wp.pl> | 2007-10-16 04:29:06 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-16 12:43:18 -0400 |
commit | 69816699fa019145dd163949d65a07093af73b67 (patch) | |
tree | 62f882257742edc6edda05349cf75789fb6fabe9 /arch/arm/mach-s3c2410/mach-bast.c | |
parent | 9fa7bc016a688630386378c205f9ee0f7b2cc834 (diff) |
s3c2410fb: adds pixclock to s3c2410fb_display
This patch adds pixelclock field to the s3c2410fb_display structure and make
use of it in the driver.
The Bast machine defined 9 modes but pixclock and margin values are defined
only for the 640x480 modes so I removed other modes.
This patch also fixes wrong display type constant for the SMDK2440 board.
Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/arm/mach-s3c2410/mach-bast.c')
-rw-r--r-- | arch/arm/mach-s3c2410/mach-bast.c | 112 |
1 files changed, 3 insertions, 109 deletions
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 61d5b2a2874c..103fc5724735 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c | |||
@@ -473,25 +473,7 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = { | |||
473 | .width = 640, | 473 | .width = 640, |
474 | .height = 480, | 474 | .height = 480, |
475 | 475 | ||
476 | .xres = 320, | 476 | .pixclock = 33333, |
477 | .yres = 240, | ||
478 | .left_margin = 40, | ||
479 | .right_margin = 20, | ||
480 | .hsync_len = 88, | ||
481 | .upper_margin = 30, | ||
482 | .lower_margin = 32, | ||
483 | .vsync_len = 3, | ||
484 | |||
485 | .bpp = 4, | ||
486 | |||
487 | .lcdcon1 = 0x00000176, | ||
488 | .lcdcon5 = 0x00014b02, | ||
489 | }, | ||
490 | { | ||
491 | .type = S3C2410_LCDCON1_TFT, | ||
492 | .width = 640, | ||
493 | .height = 480, | ||
494 | |||
495 | .xres = 640, | 477 | .xres = 640, |
496 | .yres = 480, | 478 | .yres = 480, |
497 | .bpp = 4, | 479 | .bpp = 4, |
@@ -510,42 +492,7 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = { | |||
510 | .width = 640, | 492 | .width = 640, |
511 | .height = 480, | 493 | .height = 480, |
512 | 494 | ||
513 | .xres = 800, | 495 | .pixclock = 33333, |
514 | .yres = 600, | ||
515 | .bpp = 4, | ||
516 | .left_margin = 40, | ||
517 | .right_margin = 20, | ||
518 | .hsync_len = 88, | ||
519 | .upper_margin = 30, | ||
520 | .lower_margin = 32, | ||
521 | .vsync_len = 3, | ||
522 | |||
523 | .lcdcon1 = 0x00000176, | ||
524 | .lcdcon5 = 0x00014b02, | ||
525 | }, | ||
526 | { | ||
527 | .type = S3C2410_LCDCON1_TFT, | ||
528 | .width = 640, | ||
529 | .height = 480, | ||
530 | |||
531 | .xres = 320, | ||
532 | .yres = 240, | ||
533 | .bpp = 8, | ||
534 | .left_margin = 40, | ||
535 | .right_margin = 20, | ||
536 | .hsync_len = 88, | ||
537 | .upper_margin = 30, | ||
538 | .lower_margin = 32, | ||
539 | .vsync_len = 3, | ||
540 | |||
541 | .lcdcon1 = 0x00000176, | ||
542 | .lcdcon5 = 0x00014b02, | ||
543 | }, | ||
544 | { | ||
545 | .type = S3C2410_LCDCON1_TFT, | ||
546 | .width = 640, | ||
547 | .height = 480, | ||
548 | |||
549 | .xres = 640, | 496 | .xres = 640, |
550 | .yres = 480, | 497 | .yres = 480, |
551 | .bpp = 8, | 498 | .bpp = 8, |
@@ -564,42 +511,7 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = { | |||
564 | .width = 640, | 511 | .width = 640, |
565 | .height = 480, | 512 | .height = 480, |
566 | 513 | ||
567 | .xres = 800, | 514 | .pixclock = 33333, |
568 | .yres = 600, | ||
569 | .bpp = 8, | ||
570 | .left_margin = 40, | ||
571 | .right_margin = 20, | ||
572 | .hsync_len = 88, | ||
573 | .upper_margin = 30, | ||
574 | .lower_margin = 32, | ||
575 | .vsync_len = 3, | ||
576 | |||
577 | .lcdcon1 = 0x00000176, | ||
578 | .lcdcon5 = 0x00014b02, | ||
579 | }, | ||
580 | { | ||
581 | .type = S3C2410_LCDCON1_TFT, | ||
582 | .width = 640, | ||
583 | .height = 480, | ||
584 | |||
585 | .xres = 320, | ||
586 | .yres = 240, | ||
587 | .bpp = 16, | ||
588 | .left_margin = 40, | ||
589 | .right_margin = 20, | ||
590 | .hsync_len = 88, | ||
591 | .upper_margin = 30, | ||
592 | .lower_margin = 32, | ||
593 | .vsync_len = 3, | ||
594 | |||
595 | .lcdcon1 = 0x00000176, | ||
596 | .lcdcon5 = 0x00014b02, | ||
597 | }, | ||
598 | { | ||
599 | .type = S3C2410_LCDCON1_TFT, | ||
600 | .width = 640, | ||
601 | .height = 480, | ||
602 | |||
603 | .xres = 640, | 515 | .xres = 640, |
604 | .yres = 480, | 516 | .yres = 480, |
605 | .bpp = 16, | 517 | .bpp = 16, |
@@ -613,24 +525,6 @@ static struct s3c2410fb_display __initdata bast_lcd_info[] = { | |||
613 | .lcdcon1 = 0x00000176, | 525 | .lcdcon1 = 0x00000176, |
614 | .lcdcon5 = 0x00014b02, | 526 | .lcdcon5 = 0x00014b02, |
615 | }, | 527 | }, |
616 | { | ||
617 | .type = S3C2410_LCDCON1_TFT, | ||
618 | .width = 640, | ||
619 | .height = 480, | ||
620 | |||
621 | .xres = 800, | ||
622 | .yres = 600, | ||
623 | .bpp = 16, | ||
624 | .left_margin = 40, | ||
625 | .right_margin = 20, | ||
626 | .hsync_len = 88, | ||
627 | .upper_margin = 30, | ||
628 | .lower_margin = 32, | ||
629 | .vsync_len = 3, | ||
630 | |||
631 | .lcdcon1 = 0x00000176, | ||
632 | .lcdcon5 = 0x00014b02, | ||
633 | }, | ||
634 | }; | 528 | }; |
635 | 529 | ||
636 | /* LCD/VGA controller */ | 530 | /* LCD/VGA controller */ |