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authorBen Dooks <ben-linux@fluff.org>2006-09-09 16:24:13 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-09 16:24:13 -0400
commitc6e58ebb373666eba007e3793789e06a4655df61 (patch)
tree2b325fb3be45d0768268d32fc747519513ddf2d5 /arch/arm/mach-s3c2410/irq.h
parent3c06cd1c99449b2fd373df24fbc87e804f4ec4e6 (diff)
[ARM] 3783/1: S3C2412: fix IRQ_EINT0 to IRQ_EINT3 handling
Patch from Ben Dooks The IRQ_EINT0 through IRQ_EINT3 handling has changed on the S3C2412 from the previous SoCs in the range, and thus we need to add code to handle this. The changes come about due to these IRQs being displayed in two different registers, and needing to be acked and masked in both. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2410/irq.h')
-rw-r--r--arch/arm/mach-s3c2410/irq.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/irq.h b/arch/arm/mach-s3c2410/irq.h
index 4abf0ca14e00..f7cc4c983de5 100644
--- a/arch/arm/mach-s3c2410/irq.h
+++ b/arch/arm/mach-s3c2410/irq.h
@@ -97,3 +97,8 @@ s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
97 __raw_writel(parentmask, S3C2410_INTPND); 97 __raw_writel(parentmask, S3C2410_INTPND);
98 } 98 }
99} 99}
100
101/* exported for use in arch/arm/mach-s3c2410 */
102
103extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
104extern int s3c_irqext_type(unsigned int irq, unsigned int type);