diff options
author | Len Brown <len.brown@intel.com> | 2005-09-08 01:45:47 -0400 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2005-09-08 01:45:47 -0400 |
commit | 64e47488c913ac704d465a6af86a26786d1412a5 (patch) | |
tree | d3b0148592963dcde26e4bb35ddfec8b1eaf8e23 /arch/arm/mach-s3c2410/irq.c | |
parent | 4a35a46bf1cda4737c428380d1db5d15e2590d18 (diff) | |
parent | caf39e87cc1182f7dae84eefc43ca14d54c78ef9 (diff) |
Merge linux-2.6 with linux-acpi-2.6
Diffstat (limited to 'arch/arm/mach-s3c2410/irq.c')
-rw-r--r-- | arch/arm/mach-s3c2410/irq.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-s3c2410/irq.c b/arch/arm/mach-s3c2410/irq.c index 973a5fe6769c..66d8c068e940 100644 --- a/arch/arm/mach-s3c2410/irq.c +++ b/arch/arm/mach-s3c2410/irq.c | |||
@@ -184,14 +184,14 @@ struct irqchip s3c_irq_level_chip = { | |||
184 | .ack = s3c_irq_maskack, | 184 | .ack = s3c_irq_maskack, |
185 | .mask = s3c_irq_mask, | 185 | .mask = s3c_irq_mask, |
186 | .unmask = s3c_irq_unmask, | 186 | .unmask = s3c_irq_unmask, |
187 | .wake = s3c_irq_wake | 187 | .set_wake = s3c_irq_wake |
188 | }; | 188 | }; |
189 | 189 | ||
190 | static struct irqchip s3c_irq_chip = { | 190 | static struct irqchip s3c_irq_chip = { |
191 | .ack = s3c_irq_ack, | 191 | .ack = s3c_irq_ack, |
192 | .mask = s3c_irq_mask, | 192 | .mask = s3c_irq_mask, |
193 | .unmask = s3c_irq_unmask, | 193 | .unmask = s3c_irq_unmask, |
194 | .wake = s3c_irq_wake | 194 | .set_wake = s3c_irq_wake |
195 | }; | 195 | }; |
196 | 196 | ||
197 | /* S3C2410_EINTMASK | 197 | /* S3C2410_EINTMASK |
@@ -350,16 +350,16 @@ static struct irqchip s3c_irqext_chip = { | |||
350 | .mask = s3c_irqext_mask, | 350 | .mask = s3c_irqext_mask, |
351 | .unmask = s3c_irqext_unmask, | 351 | .unmask = s3c_irqext_unmask, |
352 | .ack = s3c_irqext_ack, | 352 | .ack = s3c_irqext_ack, |
353 | .type = s3c_irqext_type, | 353 | .set_type = s3c_irqext_type, |
354 | .wake = s3c_irqext_wake | 354 | .set_wake = s3c_irqext_wake |
355 | }; | 355 | }; |
356 | 356 | ||
357 | static struct irqchip s3c_irq_eint0t4 = { | 357 | static struct irqchip s3c_irq_eint0t4 = { |
358 | .ack = s3c_irq_ack, | 358 | .ack = s3c_irq_ack, |
359 | .mask = s3c_irq_mask, | 359 | .mask = s3c_irq_mask, |
360 | .unmask = s3c_irq_unmask, | 360 | .unmask = s3c_irq_unmask, |
361 | .wake = s3c_irq_wake, | 361 | .set_wake = s3c_irq_wake, |
362 | .type = s3c_irqext_type, | 362 | .set_type = s3c_irqext_type, |
363 | }; | 363 | }; |
364 | 364 | ||
365 | /* mask values for the parent registers for each of the interrupt types */ | 365 | /* mask values for the parent registers for each of the interrupt types */ |
@@ -496,11 +496,11 @@ static void s3c_irq_demux_adc(unsigned int irq, | |||
496 | if (subsrc != 0) { | 496 | if (subsrc != 0) { |
497 | if (subsrc & 1) { | 497 | if (subsrc & 1) { |
498 | mydesc = irq_desc + IRQ_TC; | 498 | mydesc = irq_desc + IRQ_TC; |
499 | mydesc->handle( IRQ_TC, mydesc, regs); | 499 | desc_handle_irq(IRQ_TC, mydesc, regs); |
500 | } | 500 | } |
501 | if (subsrc & 2) { | 501 | if (subsrc & 2) { |
502 | mydesc = irq_desc + IRQ_ADC; | 502 | mydesc = irq_desc + IRQ_ADC; |
503 | mydesc->handle(IRQ_ADC, mydesc, regs); | 503 | desc_handle_irq(IRQ_ADC, mydesc, regs); |
504 | } | 504 | } |
505 | } | 505 | } |
506 | } | 506 | } |
@@ -529,17 +529,17 @@ static void s3c_irq_demux_uart(unsigned int start, | |||
529 | desc = irq_desc + start; | 529 | desc = irq_desc + start; |
530 | 530 | ||
531 | if (subsrc & 1) | 531 | if (subsrc & 1) |
532 | desc->handle(start, desc, regs); | 532 | desc_handle_irq(start, desc, regs); |
533 | 533 | ||
534 | desc++; | 534 | desc++; |
535 | 535 | ||
536 | if (subsrc & 2) | 536 | if (subsrc & 2) |
537 | desc->handle(start+1, desc, regs); | 537 | desc_handle_irq(start+1, desc, regs); |
538 | 538 | ||
539 | desc++; | 539 | desc++; |
540 | 540 | ||
541 | if (subsrc & 4) | 541 | if (subsrc & 4) |
542 | desc->handle(start+2, desc, regs); | 542 | desc_handle_irq(start+2, desc, regs); |
543 | } | 543 | } |
544 | } | 544 | } |
545 | 545 | ||