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authorBen Dooks <ben-linux@fluff.org>2008-12-18 09:52:00 -0500
committerBen Dooks <ben-linux@fluff.org>2008-12-18 09:52:00 -0500
commitc6ad115876763e4f15055982ecb9579cb7abab5f (patch)
tree75d2b0f5f31540ff8a2dcdde9e0f087b25c68868 /arch/arm/mach-s3c2410/include
parent1d19fdba149f4db055902c30b27adfb7d1ead058 (diff)
parent28ab44c5be60a9b91021a7cc7b4e202775c04764 (diff)
Merge branch 'next-s3c24xx' into next-merged
Diffstat (limited to 'arch/arm/mach-s3c2410/include')
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-clock.h33
-rw-r--r--arch/arm/mach-s3c2410/include/mach/regs-gpio.h7
-rw-r--r--arch/arm/mach-s3c2410/include/mach/spi.h7
-rw-r--r--arch/arm/mach-s3c2410/include/mach/timex.h26
-rw-r--r--arch/arm/mach-s3c2410/include/mach/vmalloc.h20
5 files changed, 7 insertions, 86 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-clock.h
index b3f90aa78076..2a5d90e957fb 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-clock.h
@@ -42,13 +42,6 @@
42#define S3C2410_CLKCON_IIS (1<<17) 42#define S3C2410_CLKCON_IIS (1<<17)
43#define S3C2410_CLKCON_SPI (1<<18) 43#define S3C2410_CLKCON_SPI (1<<18)
44 44
45#define S3C2410_PLLCON_MDIVSHIFT 12
46#define S3C2410_PLLCON_PDIVSHIFT 4
47#define S3C2410_PLLCON_SDIVSHIFT 0
48#define S3C2410_PLLCON_MDIVMASK ((1<<(1+(19-12)))-1)
49#define S3C2410_PLLCON_PDIVMASK ((1<<5)-1)
50#define S3C2410_PLLCON_SDIVMASK 3
51
52/* DCLKCON register addresses in gpio.h */ 45/* DCLKCON register addresses in gpio.h */
53 46
54#define S3C2410_DCLKCON_DCLK0EN (1<<0) 47#define S3C2410_DCLKCON_DCLK0EN (1<<0)
@@ -76,32 +69,6 @@
76#define S3C2410_CLKSLOW_SLOWVAL(x) (x) 69#define S3C2410_CLKSLOW_SLOWVAL(x) (x)
77#define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7) 70#define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7)
78 71
79#ifndef __ASSEMBLY__
80
81#include <asm/div64.h>
82
83static inline unsigned int
84s3c2410_get_pll(unsigned int pllval, unsigned int baseclk)
85{
86 unsigned int mdiv, pdiv, sdiv;
87 uint64_t fvco;
88
89 mdiv = pllval >> S3C2410_PLLCON_MDIVSHIFT;
90 pdiv = pllval >> S3C2410_PLLCON_PDIVSHIFT;
91 sdiv = pllval >> S3C2410_PLLCON_SDIVSHIFT;
92
93 mdiv &= S3C2410_PLLCON_MDIVMASK;
94 pdiv &= S3C2410_PLLCON_PDIVMASK;
95 sdiv &= S3C2410_PLLCON_SDIVMASK;
96
97 fvco = (uint64_t)baseclk * (mdiv + 8);
98 do_div(fvco, (pdiv + 2) << sdiv);
99
100 return (unsigned int)fvco;
101}
102
103#endif /* __ASSEMBLY__ */
104
105#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) 72#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
106 73
107/* extra registers */ 74/* extra registers */
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
index 528080ceac44..321077613067 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h
@@ -1053,13 +1053,6 @@
1053#define S3C24XX_EXTINT1 S3C24XX_GPIOREG2(0x8C) 1053#define S3C24XX_EXTINT1 S3C24XX_GPIOREG2(0x8C)
1054#define S3C24XX_EXTINT2 S3C24XX_GPIOREG2(0x90) 1054#define S3C24XX_EXTINT2 S3C24XX_GPIOREG2(0x90)
1055 1055
1056/* values for S3C2410_EXTINT0/1/2 */
1057#define S3C2410_EXTINT_LOWLEV (0x00)
1058#define S3C2410_EXTINT_HILEV (0x01)
1059#define S3C2410_EXTINT_FALLEDGE (0x02)
1060#define S3C2410_EXTINT_RISEEDGE (0x04)
1061#define S3C2410_EXTINT_BOTHEDGE (0x06)
1062
1063/* interrupt filtering conrrol for EINT16..EINT23 */ 1056/* interrupt filtering conrrol for EINT16..EINT23 */
1064#define S3C2410_EINFLT0 S3C2410_GPIOREG(0x94) 1057#define S3C2410_EINFLT0 S3C2410_GPIOREG(0x94)
1065#define S3C2410_EINFLT1 S3C2410_GPIOREG(0x98) 1058#define S3C2410_EINFLT1 S3C2410_GPIOREG(0x98)
diff --git a/arch/arm/mach-s3c2410/include/mach/spi.h b/arch/arm/mach-s3c2410/include/mach/spi.h
index 46d46f5b99f2..774f3adfe8ad 100644
--- a/arch/arm/mach-s3c2410/include/mach/spi.h
+++ b/arch/arm/mach-s3c2410/include/mach/spi.h
@@ -22,5 +22,12 @@ struct s3c2410_spi_info {
22 void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); 22 void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol);
23}; 23};
24 24
25/* Standard setup / suspend routines for SPI GPIO pins. */
26
27extern void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi,
28 int enable);
29
30extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi,
31 int enable);
25 32
26#endif /* __ASM_ARCH_SPI_H */ 33#endif /* __ASM_ARCH_SPI_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/timex.h b/arch/arm/mach-s3c2410/include/mach/timex.h
deleted file mode 100644
index 2a425ed0a7e0..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/timex.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/timex.h
2 *
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 - time parameters
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it
17 * a variable is useless. It seems as long as we make our timers an
18 * exact multiple of HZ, any value that makes a 1->1 correspondence
19 * for the time conversion functions to/from jiffies is acceptable.
20*/
21
22
23#define CLOCK_TICK_RATE 12000000
24
25
26#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/arch/arm/mach-s3c2410/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h
deleted file mode 100644
index 315b0078a34d..000000000000
--- a/arch/arm/mach-s3c2410/include/mach/vmalloc.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/vmalloc.h
2 *
3 * from arch/arm/mach-iop3xx/include/mach/vmalloc.h
4 *
5 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
6 * http://www.simtec.co.uk/products/SWLINUX/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * S3C2410 vmalloc definition
13*/
14
15#ifndef __ASM_ARCH_VMALLOC_H
16#define __ASM_ARCH_VMALLOC_H
17
18#define VMALLOC_END (0xE0000000)
19
20#endif /* __ASM_ARCH_VMALLOC_H */