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authorDan Williams <dan.j.williams@intel.com>2009-09-08 20:55:21 -0400
committerDan Williams <dan.j.williams@intel.com>2009-09-08 20:55:21 -0400
commitbbb20089a3275a19e475dbc21320c3742e3ca423 (patch)
tree216fdc1cbef450ca688135c5b8969169482d9a48 /arch/arm/mach-s3c2410/include/mach/map.h
parent3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff)
parent657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff)
Merge branch 'dmaengine' into async-tx-next
Conflicts: crypto/async_tx/async_xor.c drivers/dma/ioat/dma_v2.h drivers/dma/ioat/pci.c drivers/md/raid5.c
Diffstat (limited to 'arch/arm/mach-s3c2410/include/mach/map.h')
-rw-r--r--arch/arm/mach-s3c2410/include/mach/map.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h
index 255fdfeaf957..e99b212cb1ca 100644
--- a/arch/arm/mach-s3c2410/include/mach/map.h
+++ b/arch/arm/mach-s3c2410/include/mach/map.h
@@ -84,7 +84,6 @@
84 84
85#define S3C24XX_PA_IRQ S3C2410_PA_IRQ 85#define S3C24XX_PA_IRQ S3C2410_PA_IRQ
86#define S3C24XX_PA_MEMCTRL S3C2410_PA_MEMCTRL 86#define S3C24XX_PA_MEMCTRL S3C2410_PA_MEMCTRL
87#define S3C24XX_PA_USBHOST S3C2410_PA_USBHOST
88#define S3C24XX_PA_DMA S3C2410_PA_DMA 87#define S3C24XX_PA_DMA S3C2410_PA_DMA
89#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR 88#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR
90#define S3C24XX_PA_LCD S3C2410_PA_LCD 89#define S3C24XX_PA_LCD S3C2410_PA_LCD
@@ -102,6 +101,7 @@
102 101
103#define S3C_PA_IIC S3C2410_PA_IIC 102#define S3C_PA_IIC S3C2410_PA_IIC
104#define S3C_PA_UART S3C24XX_PA_UART 103#define S3C_PA_UART S3C24XX_PA_UART
104#define S3C_PA_USBHOST S3C2410_PA_USBHOST
105#define S3C_PA_HSMMC0 S3C2443_PA_HSMMC 105#define S3C_PA_HSMMC0 S3C2443_PA_HSMMC
106 106
107#endif /* __ASM_ARCH_MAP_H */ 107#endif /* __ASM_ARCH_MAP_H */