diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-14 16:42:43 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-14 16:42:43 -0400 |
commit | 2cf4d4514d5b43c1f3b64bd0ec8b9853bde8f1dc (patch) | |
tree | e35a625496acc6ac852846d40b8851186b9d1ac4 /arch/arm/mach-s3c2410/include/mach/gpio-fns.h | |
parent | 44b7532b8b464f606053562400719c9c21276037 (diff) | |
parent | ce53895a5d24e0ee19fb92f56c17323fb4c9ab27 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (417 commits)
MAINTAINERS: EB110ATX is not ebsa110
MAINTAINERS: update Eric Miao's email address and status
fb: add support of LCD display controller on pxa168/910 (base layer)
[ARM] 5552/1: ep93xx get_uart_rate(): use EP93XX_SYSCON_PWRCNT and EP93XX_SYSCON_PWRCN
[ARM] pxa/sharpsl_pm: zaurus needs generic pxa suspend/resume routines
[ARM] 5544/1: Trust PrimeCell resource sizes
[ARM] pxa/sharpsl_pm: cleanup of gpio-related code.
[ARM] pxa/sharpsl_pm: drop set_irq_type calls
[ARM] pxa/sharpsl_pm: merge pxa-specific code into generic one
[ARM] pxa/sharpsl_pm: merge the two sharpsl_pm.c since it's now pxa specific
[ARM] sa1100: remove unused collie_pm.c
[ARM] pxa: fix the conflicting non-static declarations of global_gpios[]
[ARM] 5550/1: Add default configure file for w90p910 platform
[ARM] 5549/1: Add clock api for w90p910 platform.
[ARM] 5548/1: Add gpio api for w90p910 platform
[ARM] 5551/1: Add multi-function pin api for w90p910 platform.
[ARM] Make ARM_VIC_NR depend on ARM_VIC
[ARM] 5546/1: ARM PL022 SSP/SPI driver v3
ARM: OMAP4: SMP: Update defconfig for OMAP4430
ARM: OMAP4: SMP: Enable SMP support for OMAP4430
...
Diffstat (limited to 'arch/arm/mach-s3c2410/include/mach/gpio-fns.h')
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/gpio-fns.h | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-fns.h b/arch/arm/mach-s3c2410/include/mach/gpio-fns.h new file mode 100644 index 000000000000..801dff13858d --- /dev/null +++ b/arch/arm/mach-s3c2410/include/mach/gpio-fns.h | |||
@@ -0,0 +1,103 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/gpio-fns.h | ||
2 | * | ||
3 | * Copyright (c) 2003,2009 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2410 - hardware | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* These functions are in the to-be-removed category and it is strongly | ||
14 | * encouraged not to use these in new code. They will be marked deprecated | ||
15 | * very soon. | ||
16 | * | ||
17 | * Most of the functionality can be either replaced by the gpiocfg calls | ||
18 | * for the s3c platform or by the generic GPIOlib API. | ||
19 | */ | ||
20 | |||
21 | /* external functions for GPIO support | ||
22 | * | ||
23 | * These allow various different clients to access the same GPIO | ||
24 | * registers without conflicting. If your driver only owns the entire | ||
25 | * GPIO register, then it is safe to ioremap/__raw_{read|write} to it. | ||
26 | */ | ||
27 | |||
28 | /* s3c2410_gpio_cfgpin | ||
29 | * | ||
30 | * set the configuration of the given pin to the value passed. | ||
31 | * | ||
32 | * eg: | ||
33 | * s3c2410_gpio_cfgpin(S3C2410_GPA(0), S3C2410_GPA0_ADDR0); | ||
34 | * s3c2410_gpio_cfgpin(S3C2410_GPE(8), S3C2410_GPE8_SDDAT1); | ||
35 | */ | ||
36 | |||
37 | extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function); | ||
38 | |||
39 | extern unsigned int s3c2410_gpio_getcfg(unsigned int pin); | ||
40 | |||
41 | /* s3c2410_gpio_getirq | ||
42 | * | ||
43 | * turn the given pin number into the corresponding IRQ number | ||
44 | * | ||
45 | * returns: | ||
46 | * < 0 = no interrupt for this pin | ||
47 | * >=0 = interrupt number for the pin | ||
48 | */ | ||
49 | |||
50 | extern int s3c2410_gpio_getirq(unsigned int pin); | ||
51 | |||
52 | #ifdef CONFIG_CPU_S3C2400 | ||
53 | |||
54 | extern int s3c2400_gpio_getirq(unsigned int pin); | ||
55 | |||
56 | #endif /* CONFIG_CPU_S3C2400 */ | ||
57 | |||
58 | /* s3c2410_gpio_irqfilter | ||
59 | * | ||
60 | * set the irq filtering on the given pin | ||
61 | * | ||
62 | * on = 0 => disable filtering | ||
63 | * 1 => enable filtering | ||
64 | * | ||
65 | * config = S3C2410_EINTFLT_PCLK or S3C2410_EINTFLT_EXTCLK orred with | ||
66 | * width of filter (0 through 63) | ||
67 | * | ||
68 | * | ||
69 | */ | ||
70 | |||
71 | extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, | ||
72 | unsigned int config); | ||
73 | |||
74 | /* s3c2410_gpio_pullup | ||
75 | * | ||
76 | * configure the pull-up control on the given pin | ||
77 | * | ||
78 | * to = 1 => disable the pull-up | ||
79 | * 0 => enable the pull-up | ||
80 | * | ||
81 | * eg; | ||
82 | * | ||
83 | * s3c2410_gpio_pullup(S3C2410_GPB(0), 0); | ||
84 | * s3c2410_gpio_pullup(S3C2410_GPE(8), 0); | ||
85 | */ | ||
86 | |||
87 | extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to); | ||
88 | |||
89 | /* s3c2410_gpio_getpull | ||
90 | * | ||
91 | * Read the state of the pull-up on a given pin | ||
92 | * | ||
93 | * return: | ||
94 | * < 0 => error code | ||
95 | * 0 => enabled | ||
96 | * 1 => disabled | ||
97 | */ | ||
98 | |||
99 | extern int s3c2410_gpio_getpull(unsigned int pin); | ||
100 | |||
101 | extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to); | ||
102 | |||
103 | extern unsigned int s3c2410_gpio_getpin(unsigned int pin); | ||