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| author | Tony Luck <tony.luck@intel.com> | 2005-06-15 17:06:48 -0400 |
|---|---|---|
| committer | Tony Luck <tony.luck@intel.com> | 2005-06-15 17:06:48 -0400 |
| commit | f2cbb4f01936a3e4225692e03b084b78c56d386d (patch) | |
| tree | f89f3d8baa250589a38a4dd2df56f84cddae3c76 /arch/arm/mach-s3c2410/clock.c | |
| parent | 325a479c4c110db278ef3361460a48c4093252cc (diff) | |
| parent | 1016888fb69662936b32ab767c7419a3be9a69d3 (diff) | |
Auto merge with /home/aegl/GIT/linus
Diffstat (limited to 'arch/arm/mach-s3c2410/clock.c')
| -rw-r--r-- | arch/arm/mach-s3c2410/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c index e23f534d4e1d..8d986b8401c2 100644 --- a/arch/arm/mach-s3c2410/clock.c +++ b/arch/arm/mach-s3c2410/clock.c | |||
| @@ -478,7 +478,7 @@ static int s3c2440_clk_add(struct sys_device *sysdev) | |||
| 478 | { | 478 | { |
| 479 | unsigned long upllcon = __raw_readl(S3C2410_UPLLCON); | 479 | unsigned long upllcon = __raw_readl(S3C2410_UPLLCON); |
| 480 | 480 | ||
| 481 | s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal.rate) * 2; | 481 | s3c2440_clk_upll.rate = s3c2410_get_pll(upllcon, clk_xtal.rate); |
| 482 | 482 | ||
| 483 | printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n", | 483 | printk("S3C2440: Clock Support, UPLL %ld.%03ld MHz\n", |
| 484 | print_mhz(s3c2440_clk_upll.rate)); | 484 | print_mhz(s3c2440_clk_upll.rate)); |