aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-realview
diff options
context:
space:
mode:
authorRussell King <rmk+kernel@arm.linux.org.uk>2012-01-26 14:59:44 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-01-26 14:59:44 -0500
commitdcf81c1af839b77b44404453ecae6e5ac5a75f05 (patch)
tree289dcbda5fbca34e7e0cf028908b9b517fa8b8b2 /arch/arm/mach-realview
parent34e5f4f198ddd36a82dc12164de7fc4f5430e09d (diff)
parent75c06963dd947252271ffa6107a25cddb2b8f362 (diff)
Merge branch 'amba' into for-armsoc
Diffstat (limited to 'arch/arm/mach-realview')
-rw-r--r--arch/arm/mach-realview/core.h20
-rw-r--r--arch/arm/mach-realview/include/mach/irqs-pb1176.h2
-rw-r--r--arch/arm/mach-realview/realview_eb.c78
-rw-r--r--arch/arm/mach-realview/realview_pb1176.c78
-rw-r--r--arch/arm/mach-realview/realview_pb11mp.c78
-rw-r--r--arch/arm/mach-realview/realview_pba8.c78
-rw-r--r--arch/arm/mach-realview/realview_pbx.c78
7 files changed, 201 insertions, 211 deletions
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h
index 735b57aaf2d6..f8f2c0ac4c01 100644
--- a/arch/arm/mach-realview/core.h
+++ b/arch/arm/mach-realview/core.h
@@ -28,21 +28,11 @@
28#include <asm/setup.h> 28#include <asm/setup.h>
29#include <asm/leds.h> 29#include <asm/leds.h>
30 30
31#define AMBA_DEVICE(name,busid,base,plat) \ 31#define APB_DEVICE(name, busid, base, plat) \
32static struct amba_device name##_device = { \ 32static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
33 .dev = { \ 33
34 .coherent_dma_mask = ~0, \ 34#define AHB_DEVICE(name, busid, base, plat) \
35 .init_name = busid, \ 35static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat)
36 .platform_data = plat, \
37 }, \
38 .res = { \
39 .start = REALVIEW_##base##_BASE, \
40 .end = (REALVIEW_##base##_BASE) + SZ_4K - 1, \
41 .flags = IORESOURCE_MEM, \
42 }, \
43 .dma_mask = ~0, \
44 .irq = base##_IRQ, \
45}
46 36
47struct machine_desc; 37struct machine_desc;
48 38
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
index 5c3c625e3e04..708f84156f2c 100644
--- a/arch/arm/mach-realview/include/mach/irqs-pb1176.h
+++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h
@@ -40,6 +40,7 @@
40#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) 40#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
41#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) 41#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
42#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ 42#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
43#define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16)
43#define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ 44#define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */
44#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ 45#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
45#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ 46#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
@@ -73,7 +74,6 @@
73#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ 74#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
74#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ 75#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
75 76
76#define IRQ_PB1176_GPIO0 -1
77#define IRQ_PB1176_SCTL -1 77#define IRQ_PB1176_SCTL -1
78 78
79#define NR_GIC_PB1176 2 79#define NR_GIC_PB1176 2
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index e62962117763..fbca43cf77ed 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -140,63 +140,63 @@ static struct pl022_ssp_controller ssp0_plat_data = {
140/* 140/*
141 * These devices are connected via the core APB bridge 141 * These devices are connected via the core APB bridge
142 */ 142 */
143#define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } 143#define GPIO2_IRQ { IRQ_EB_GPIO2 }
144#define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } 144#define GPIO3_IRQ { IRQ_EB_GPIO3 }
145 145
146#define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } 146#define AACI_IRQ { IRQ_EB_AACI }
147#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } 147#define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
148#define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } 148#define KMI0_IRQ { IRQ_EB_KMI0 }
149#define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } 149#define KMI1_IRQ { IRQ_EB_KMI1 }
150 150
151/* 151/*
152 * These devices are connected directly to the multi-layer AHB switch 152 * These devices are connected directly to the multi-layer AHB switch
153 */ 153 */
154#define EB_SMC_IRQ { NO_IRQ, NO_IRQ } 154#define EB_SMC_IRQ { }
155#define MPMC_IRQ { NO_IRQ, NO_IRQ } 155#define MPMC_IRQ { }
156#define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } 156#define EB_CLCD_IRQ { IRQ_EB_CLCD }
157#define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } 157#define DMAC_IRQ { IRQ_EB_DMA }
158 158
159/* 159/*
160 * These devices are connected via the core APB bridge 160 * These devices are connected via the core APB bridge
161 */ 161 */
162#define SCTL_IRQ { NO_IRQ, NO_IRQ } 162#define SCTL_IRQ { }
163#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } 163#define EB_WATCHDOG_IRQ { IRQ_EB_WDOG }
164#define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } 164#define EB_GPIO0_IRQ { IRQ_EB_GPIO0 }
165#define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } 165#define GPIO1_IRQ { IRQ_EB_GPIO1 }
166#define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } 166#define EB_RTC_IRQ { IRQ_EB_RTC }
167 167
168/* 168/*
169 * These devices are connected via the DMA APB bridge 169 * These devices are connected via the DMA APB bridge
170 */ 170 */
171#define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } 171#define SCI_IRQ { IRQ_EB_SCI }
172#define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } 172#define EB_UART0_IRQ { IRQ_EB_UART0 }
173#define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } 173#define EB_UART1_IRQ { IRQ_EB_UART1 }
174#define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } 174#define EB_UART2_IRQ { IRQ_EB_UART2 }
175#define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } 175#define EB_UART3_IRQ { IRQ_EB_UART3 }
176#define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } 176#define EB_SSP_IRQ { IRQ_EB_SSP }
177 177
178/* FPGA Primecells */ 178/* FPGA Primecells */
179AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 179APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
180AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 180APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
181AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 181APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
182AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 182APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
183AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); 183APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL);
184 184
185/* DevChip Primecells */ 185/* DevChip Primecells */
186AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL); 186AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL);
187AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); 187AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data);
188AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL); 188AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL);
189AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 189AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
190AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); 190APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL);
191AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); 191APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data);
192AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 192APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
193AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 193APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
194AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); 194APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL);
195AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 195APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
196AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); 196APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL);
197AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); 197APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL);
198AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); 198APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL);
199AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); 199APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data);
200 200
201static struct amba_device *amba_devs[] __initdata = { 201static struct amba_device *amba_devs[] __initdata = {
202 &dmac_device, 202 &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c
index e4abe94fb11a..b1d7cafa1a6d 100644
--- a/arch/arm/mach-realview/realview_pb1176.c
+++ b/arch/arm/mach-realview/realview_pb1176.c
@@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = {
132/* 132/*
133 * RealView PB1176 AMBA devices 133 * RealView PB1176 AMBA devices
134 */ 134 */
135#define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } 135#define GPIO2_IRQ { IRQ_PB1176_GPIO2 }
136#define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } 136#define GPIO3_IRQ { IRQ_PB1176_GPIO3 }
137#define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } 137#define AACI_IRQ { IRQ_PB1176_AACI }
138#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } 138#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
139#define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } 139#define KMI0_IRQ { IRQ_PB1176_KMI0 }
140#define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } 140#define KMI1_IRQ { IRQ_PB1176_KMI1 }
141#define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } 141#define PB1176_SMC_IRQ { }
142#define MPMC_IRQ { NO_IRQ, NO_IRQ } 142#define MPMC_IRQ { }
143#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } 143#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD }
144#define SCTL_IRQ { NO_IRQ, NO_IRQ } 144#define SCTL_IRQ { }
145#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } 145#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG }
146#define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ } 146#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 }
147#define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } 147#define GPIO1_IRQ { IRQ_PB1176_GPIO1 }
148#define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } 148#define PB1176_RTC_IRQ { IRQ_DC1176_RTC }
149#define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } 149#define SCI_IRQ { IRQ_PB1176_SCI }
150#define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } 150#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 }
151#define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } 151#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 }
152#define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } 152#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 }
153#define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } 153#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 }
154#define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } 154#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 }
155#define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } 155#define PB1176_SSP_IRQ { IRQ_DC1176_SSP }
156 156
157/* FPGA Primecells */ 157/* FPGA Primecells */
158AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 158APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
159AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 159APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
160AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 160APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
161AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 161APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
162AMBA_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); 162APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL);
163 163
164/* DevChip Primecells */ 164/* DevChip Primecells */
165AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); 165AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
166AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 166AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
167AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); 167APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL);
168AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); 168APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data);
169AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 169APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
170AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 170APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
171AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); 171APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL);
172AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 172APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
173AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); 173APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
174AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); 174APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
175AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); 175APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
176AMBA_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); 176APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL);
177AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); 177APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data);
178AMBA_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); 178AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data);
179 179
180static struct amba_device *amba_devs[] __initdata = { 180static struct amba_device *amba_devs[] __initdata = {
181 &uart0_device, 181 &uart0_device,
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c
index 127a3fd42ab1..43b82bc9ca8e 100644
--- a/arch/arm/mach-realview/realview_pb11mp.c
+++ b/arch/arm/mach-realview/realview_pb11mp.c
@@ -132,52 +132,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
132 * RealView PB11MPCore AMBA devices 132 * RealView PB11MPCore AMBA devices
133 */ 133 */
134 134
135#define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } 135#define GPIO2_IRQ { IRQ_PB11MP_GPIO2 }
136#define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } 136#define GPIO3_IRQ { IRQ_PB11MP_GPIO3 }
137#define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } 137#define AACI_IRQ { IRQ_TC11MP_AACI }
138#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } 138#define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B }
139#define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } 139#define KMI0_IRQ { IRQ_TC11MP_KMI0 }
140#define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } 140#define KMI1_IRQ { IRQ_TC11MP_KMI1 }
141#define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } 141#define PB11MP_SMC_IRQ { }
142#define MPMC_IRQ { NO_IRQ, NO_IRQ } 142#define MPMC_IRQ { }
143#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } 143#define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD }
144#define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } 144#define DMAC_IRQ { IRQ_PB11MP_DMAC }
145#define SCTL_IRQ { NO_IRQ, NO_IRQ } 145#define SCTL_IRQ { }
146#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } 146#define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG }
147#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } 147#define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 }
148#define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } 148#define GPIO1_IRQ { IRQ_PB11MP_GPIO1 }
149#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } 149#define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC }
150#define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } 150#define SCI_IRQ { IRQ_PB11MP_SCI }
151#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } 151#define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 }
152#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } 152#define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 }
153#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } 153#define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 }
154#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } 154#define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 }
155#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } 155#define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP }
156 156
157/* FPGA Primecells */ 157/* FPGA Primecells */
158AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 158APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
159AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 159APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
160AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 160APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
161AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 161APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
162AMBA_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); 162APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL);
163 163
164/* DevChip Primecells */ 164/* DevChip Primecells */
165AMBA_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); 165AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL);
166AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 166AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
167AMBA_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); 167APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL);
168AMBA_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); 168APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data);
169AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 169APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
170AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 170APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
171AMBA_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); 171APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL);
172AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 172APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
173AMBA_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); 173APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL);
174AMBA_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); 174APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL);
175AMBA_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); 175APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL);
176AMBA_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); 176APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data);
177 177
178/* Primecells on the NEC ISSP chip */ 178/* Primecells on the NEC ISSP chip */
179AMBA_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); 179AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data);
180AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); 180AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
181 181
182static struct amba_device *amba_devs[] __initdata = { 182static struct amba_device *amba_devs[] __initdata = {
183 &dmac_device, 183 &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
index 25b2e59296f8..59650174e6ed 100644
--- a/arch/arm/mach-realview/realview_pba8.c
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
122 * RealView PBA8Core AMBA devices 122 * RealView PBA8Core AMBA devices
123 */ 123 */
124 124
125#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } 125#define GPIO2_IRQ { IRQ_PBA8_GPIO2 }
126#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } 126#define GPIO3_IRQ { IRQ_PBA8_GPIO3 }
127#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } 127#define AACI_IRQ { IRQ_PBA8_AACI }
128#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } 128#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
129#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } 129#define KMI0_IRQ { IRQ_PBA8_KMI0 }
130#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } 130#define KMI1_IRQ { IRQ_PBA8_KMI1 }
131#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } 131#define PBA8_SMC_IRQ { }
132#define MPMC_IRQ { NO_IRQ, NO_IRQ } 132#define MPMC_IRQ { }
133#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } 133#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD }
134#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } 134#define DMAC_IRQ { IRQ_PBA8_DMAC }
135#define SCTL_IRQ { NO_IRQ, NO_IRQ } 135#define SCTL_IRQ { }
136#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } 136#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG }
137#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } 137#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 }
138#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } 138#define GPIO1_IRQ { IRQ_PBA8_GPIO1 }
139#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } 139#define PBA8_RTC_IRQ { IRQ_PBA8_RTC }
140#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } 140#define SCI_IRQ { IRQ_PBA8_SCI }
141#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } 141#define PBA8_UART0_IRQ { IRQ_PBA8_UART0 }
142#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } 142#define PBA8_UART1_IRQ { IRQ_PBA8_UART1 }
143#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } 143#define PBA8_UART2_IRQ { IRQ_PBA8_UART2 }
144#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } 144#define PBA8_UART3_IRQ { IRQ_PBA8_UART3 }
145#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } 145#define PBA8_SSP_IRQ { IRQ_PBA8_SSP }
146 146
147/* FPGA Primecells */ 147/* FPGA Primecells */
148AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 148APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
149AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 149APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
150AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 150APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
151AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 151APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
152AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); 152APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL);
153 153
154/* DevChip Primecells */ 154/* DevChip Primecells */
155AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); 155AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL);
156AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 156AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
157AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); 157APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL);
158AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); 158APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data);
159AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 159APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
160AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 160APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
161AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); 161APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL);
162AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 162APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
163AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); 163APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL);
164AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); 164APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL);
165AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); 165APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL);
166AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); 166APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data);
167 167
168/* Primecells on the NEC ISSP chip */ 168/* Primecells on the NEC ISSP chip */
169AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); 169AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data);
170AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); 170AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
171 171
172static struct amba_device *amba_devs[] __initdata = { 172static struct amba_device *amba_devs[] __initdata = {
173 &dmac_device, 173 &dmac_device,
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c
index ac715645b860..1cd9956f5875 100644
--- a/arch/arm/mach-realview/realview_pbx.c
+++ b/arch/arm/mach-realview/realview_pbx.c
@@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = {
144 * RealView PBXCore AMBA devices 144 * RealView PBXCore AMBA devices
145 */ 145 */
146 146
147#define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } 147#define GPIO2_IRQ { IRQ_PBX_GPIO2 }
148#define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } 148#define GPIO3_IRQ { IRQ_PBX_GPIO3 }
149#define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } 149#define AACI_IRQ { IRQ_PBX_AACI }
150#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } 150#define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B }
151#define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } 151#define KMI0_IRQ { IRQ_PBX_KMI0 }
152#define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } 152#define KMI1_IRQ { IRQ_PBX_KMI1 }
153#define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } 153#define PBX_SMC_IRQ { }
154#define MPMC_IRQ { NO_IRQ, NO_IRQ } 154#define MPMC_IRQ { }
155#define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } 155#define PBX_CLCD_IRQ { IRQ_PBX_CLCD }
156#define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } 156#define DMAC_IRQ { IRQ_PBX_DMAC }
157#define SCTL_IRQ { NO_IRQ, NO_IRQ } 157#define SCTL_IRQ { }
158#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } 158#define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG }
159#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } 159#define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 }
160#define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } 160#define GPIO1_IRQ { IRQ_PBX_GPIO1 }
161#define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } 161#define PBX_RTC_IRQ { IRQ_PBX_RTC }
162#define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } 162#define SCI_IRQ { IRQ_PBX_SCI }
163#define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } 163#define PBX_UART0_IRQ { IRQ_PBX_UART0 }
164#define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } 164#define PBX_UART1_IRQ { IRQ_PBX_UART1 }
165#define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } 165#define PBX_UART2_IRQ { IRQ_PBX_UART2 }
166#define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } 166#define PBX_UART3_IRQ { IRQ_PBX_UART3 }
167#define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } 167#define PBX_SSP_IRQ { IRQ_PBX_SSP }
168 168
169/* FPGA Primecells */ 169/* FPGA Primecells */
170AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); 170APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
171AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); 171APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
172AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); 172APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
173AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); 173APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
174AMBA_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); 174APB_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL);
175 175
176/* DevChip Primecells */ 176/* DevChip Primecells */
177AMBA_DEVICE(smc, "dev:smc", PBX_SMC, NULL); 177AHB_DEVICE(smc, "dev:smc", PBX_SMC, NULL);
178AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); 178AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
179AMBA_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); 179APB_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL);
180AMBA_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); 180APB_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data);
181AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); 181APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
182AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); 182APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
183AMBA_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); 183APB_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL);
184AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); 184APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
185AMBA_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); 185APB_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL);
186AMBA_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); 186APB_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL);
187AMBA_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); 187APB_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL);
188AMBA_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); 188APB_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data);
189 189
190/* Primecells on the NEC ISSP chip */ 190/* Primecells on the NEC ISSP chip */
191AMBA_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); 191AHB_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data);
192AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); 192AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL);
193 193
194static struct amba_device *amba_devs[] __initdata = { 194static struct amba_device *amba_devs[] __initdata = {
195 &dmac_device, 195 &dmac_device,
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-26 21:22:40 -0500