diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-12-18 06:40:46 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-25 06:04:01 -0500 |
commit | 0dada61a29ddaaca5985c76aafec341b4ad3e989 (patch) | |
tree | d34e8b34f9f9ed0dd01004c3dec91e41cc8eaff4 /arch/arm/mach-realview | |
parent | 8a47ae8b96640bc9f049dce0d8ba6980176da0ea (diff) |
ARM: amba: integrator/realview/versatile/vexpress: get rid of NO_IRQ initializers
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-realview')
-rw-r--r-- | arch/arm/mach-realview/realview_eb.c | 40 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_pb1176.c | 40 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_pb11mp.c | 40 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_pba8.c | 40 | ||||
-rw-r--r-- | arch/arm/mach-realview/realview_pbx.c | 40 |
5 files changed, 100 insertions, 100 deletions
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index e62962117763..5c810e5886a1 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
@@ -140,40 +140,40 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
140 | /* | 140 | /* |
141 | * These devices are connected via the core APB bridge | 141 | * These devices are connected via the core APB bridge |
142 | */ | 142 | */ |
143 | #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } | 143 | #define GPIO2_IRQ { IRQ_EB_GPIO2 } |
144 | #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } | 144 | #define GPIO3_IRQ { IRQ_EB_GPIO3 } |
145 | 145 | ||
146 | #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } | 146 | #define AACI_IRQ { IRQ_EB_AACI } |
147 | #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } | 147 | #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } |
148 | #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } | 148 | #define KMI0_IRQ { IRQ_EB_KMI0 } |
149 | #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } | 149 | #define KMI1_IRQ { IRQ_EB_KMI1 } |
150 | 150 | ||
151 | /* | 151 | /* |
152 | * These devices are connected directly to the multi-layer AHB switch | 152 | * These devices are connected directly to the multi-layer AHB switch |
153 | */ | 153 | */ |
154 | #define EB_SMC_IRQ { NO_IRQ, NO_IRQ } | 154 | #define EB_SMC_IRQ { } |
155 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 155 | #define MPMC_IRQ { } |
156 | #define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } | 156 | #define EB_CLCD_IRQ { IRQ_EB_CLCD } |
157 | #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } | 157 | #define DMAC_IRQ { IRQ_EB_DMA } |
158 | 158 | ||
159 | /* | 159 | /* |
160 | * These devices are connected via the core APB bridge | 160 | * These devices are connected via the core APB bridge |
161 | */ | 161 | */ |
162 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 162 | #define SCTL_IRQ { } |
163 | #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } | 163 | #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG } |
164 | #define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } | 164 | #define EB_GPIO0_IRQ { IRQ_EB_GPIO0 } |
165 | #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } | 165 | #define GPIO1_IRQ { IRQ_EB_GPIO1 } |
166 | #define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } | 166 | #define EB_RTC_IRQ { IRQ_EB_RTC } |
167 | 167 | ||
168 | /* | 168 | /* |
169 | * These devices are connected via the DMA APB bridge | 169 | * These devices are connected via the DMA APB bridge |
170 | */ | 170 | */ |
171 | #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } | 171 | #define SCI_IRQ { IRQ_EB_SCI } |
172 | #define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } | 172 | #define EB_UART0_IRQ { IRQ_EB_UART0 } |
173 | #define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } | 173 | #define EB_UART1_IRQ { IRQ_EB_UART1 } |
174 | #define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } | 174 | #define EB_UART2_IRQ { IRQ_EB_UART2 } |
175 | #define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } | 175 | #define EB_UART3_IRQ { IRQ_EB_UART3 } |
176 | #define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } | 176 | #define EB_SSP_IRQ { IRQ_EB_SSP } |
177 | 177 | ||
178 | /* FPGA Primecells */ | 178 | /* FPGA Primecells */ |
179 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 179 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index 913d105caab6..485cc07204b4 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c | |||
@@ -132,27 +132,27 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
132 | /* | 132 | /* |
133 | * RealView PB1176 AMBA devices | 133 | * RealView PB1176 AMBA devices |
134 | */ | 134 | */ |
135 | #define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } | 135 | #define GPIO2_IRQ { IRQ_PB1176_GPIO2 } |
136 | #define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } | 136 | #define GPIO3_IRQ { IRQ_PB1176_GPIO3 } |
137 | #define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } | 137 | #define AACI_IRQ { IRQ_PB1176_AACI } |
138 | #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } | 138 | #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } |
139 | #define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } | 139 | #define KMI0_IRQ { IRQ_PB1176_KMI0 } |
140 | #define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } | 140 | #define KMI1_IRQ { IRQ_PB1176_KMI1 } |
141 | #define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } | 141 | #define PB1176_SMC_IRQ { } |
142 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 142 | #define MPMC_IRQ { } |
143 | #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } | 143 | #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD } |
144 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 144 | #define SCTL_IRQ { } |
145 | #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } | 145 | #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG } |
146 | #define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0, NO_IRQ } | 146 | #define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 } |
147 | #define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } | 147 | #define GPIO1_IRQ { IRQ_PB1176_GPIO1 } |
148 | #define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } | 148 | #define PB1176_RTC_IRQ { IRQ_DC1176_RTC } |
149 | #define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } | 149 | #define SCI_IRQ { IRQ_PB1176_SCI } |
150 | #define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } | 150 | #define PB1176_UART0_IRQ { IRQ_DC1176_UART0 } |
151 | #define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } | 151 | #define PB1176_UART1_IRQ { IRQ_DC1176_UART1 } |
152 | #define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } | 152 | #define PB1176_UART2_IRQ { IRQ_DC1176_UART2 } |
153 | #define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } | 153 | #define PB1176_UART3_IRQ { IRQ_DC1176_UART3 } |
154 | #define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } | 154 | #define PB1176_UART4_IRQ { IRQ_PB1176_UART4 } |
155 | #define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } | 155 | #define PB1176_SSP_IRQ { IRQ_DC1176_SSP } |
156 | 156 | ||
157 | /* FPGA Primecells */ | 157 | /* FPGA Primecells */ |
158 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 158 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 127a3fd42ab1..cb4f2daf58ea 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c | |||
@@ -132,27 +132,27 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
132 | * RealView PB11MPCore AMBA devices | 132 | * RealView PB11MPCore AMBA devices |
133 | */ | 133 | */ |
134 | 134 | ||
135 | #define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } | 135 | #define GPIO2_IRQ { IRQ_PB11MP_GPIO2 } |
136 | #define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } | 136 | #define GPIO3_IRQ { IRQ_PB11MP_GPIO3 } |
137 | #define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } | 137 | #define AACI_IRQ { IRQ_TC11MP_AACI } |
138 | #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } | 138 | #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } |
139 | #define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } | 139 | #define KMI0_IRQ { IRQ_TC11MP_KMI0 } |
140 | #define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } | 140 | #define KMI1_IRQ { IRQ_TC11MP_KMI1 } |
141 | #define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } | 141 | #define PB11MP_SMC_IRQ { } |
142 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 142 | #define MPMC_IRQ { } |
143 | #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } | 143 | #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD } |
144 | #define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } | 144 | #define DMAC_IRQ { IRQ_PB11MP_DMAC } |
145 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 145 | #define SCTL_IRQ { } |
146 | #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } | 146 | #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG } |
147 | #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } | 147 | #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 } |
148 | #define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } | 148 | #define GPIO1_IRQ { IRQ_PB11MP_GPIO1 } |
149 | #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } | 149 | #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC } |
150 | #define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } | 150 | #define SCI_IRQ { IRQ_PB11MP_SCI } |
151 | #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } | 151 | #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 } |
152 | #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } | 152 | #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 } |
153 | #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } | 153 | #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 } |
154 | #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } | 154 | #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 } |
155 | #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } | 155 | #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP } |
156 | 156 | ||
157 | /* FPGA Primecells */ | 157 | /* FPGA Primecells */ |
158 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 158 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 25b2e59296f8..293de2155ca7 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c | |||
@@ -122,27 +122,27 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
122 | * RealView PBA8Core AMBA devices | 122 | * RealView PBA8Core AMBA devices |
123 | */ | 123 | */ |
124 | 124 | ||
125 | #define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } | 125 | #define GPIO2_IRQ { IRQ_PBA8_GPIO2 } |
126 | #define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } | 126 | #define GPIO3_IRQ { IRQ_PBA8_GPIO3 } |
127 | #define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } | 127 | #define AACI_IRQ { IRQ_PBA8_AACI } |
128 | #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } | 128 | #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } |
129 | #define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } | 129 | #define KMI0_IRQ { IRQ_PBA8_KMI0 } |
130 | #define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } | 130 | #define KMI1_IRQ { IRQ_PBA8_KMI1 } |
131 | #define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } | 131 | #define PBA8_SMC_IRQ { } |
132 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 132 | #define MPMC_IRQ { } |
133 | #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } | 133 | #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD } |
134 | #define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } | 134 | #define DMAC_IRQ { IRQ_PBA8_DMAC } |
135 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 135 | #define SCTL_IRQ { } |
136 | #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } | 136 | #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG } |
137 | #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } | 137 | #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 } |
138 | #define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } | 138 | #define GPIO1_IRQ { IRQ_PBA8_GPIO1 } |
139 | #define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } | 139 | #define PBA8_RTC_IRQ { IRQ_PBA8_RTC } |
140 | #define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } | 140 | #define SCI_IRQ { IRQ_PBA8_SCI } |
141 | #define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } | 141 | #define PBA8_UART0_IRQ { IRQ_PBA8_UART0 } |
142 | #define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } | 142 | #define PBA8_UART1_IRQ { IRQ_PBA8_UART1 } |
143 | #define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } | 143 | #define PBA8_UART2_IRQ { IRQ_PBA8_UART2 } |
144 | #define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } | 144 | #define PBA8_UART3_IRQ { IRQ_PBA8_UART3 } |
145 | #define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } | 145 | #define PBA8_SSP_IRQ { IRQ_PBA8_SSP } |
146 | 146 | ||
147 | /* FPGA Primecells */ | 147 | /* FPGA Primecells */ |
148 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 148 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index ac715645b860..8e2a30630856 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c | |||
@@ -144,27 +144,27 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
144 | * RealView PBXCore AMBA devices | 144 | * RealView PBXCore AMBA devices |
145 | */ | 145 | */ |
146 | 146 | ||
147 | #define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } | 147 | #define GPIO2_IRQ { IRQ_PBX_GPIO2 } |
148 | #define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } | 148 | #define GPIO3_IRQ { IRQ_PBX_GPIO3 } |
149 | #define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } | 149 | #define AACI_IRQ { IRQ_PBX_AACI } |
150 | #define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } | 150 | #define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } |
151 | #define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } | 151 | #define KMI0_IRQ { IRQ_PBX_KMI0 } |
152 | #define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } | 152 | #define KMI1_IRQ { IRQ_PBX_KMI1 } |
153 | #define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } | 153 | #define PBX_SMC_IRQ { } |
154 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 154 | #define MPMC_IRQ { } |
155 | #define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } | 155 | #define PBX_CLCD_IRQ { IRQ_PBX_CLCD } |
156 | #define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } | 156 | #define DMAC_IRQ { IRQ_PBX_DMAC } |
157 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 157 | #define SCTL_IRQ { } |
158 | #define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } | 158 | #define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG } |
159 | #define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } | 159 | #define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 } |
160 | #define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } | 160 | #define GPIO1_IRQ { IRQ_PBX_GPIO1 } |
161 | #define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } | 161 | #define PBX_RTC_IRQ { IRQ_PBX_RTC } |
162 | #define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } | 162 | #define SCI_IRQ { IRQ_PBX_SCI } |
163 | #define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } | 163 | #define PBX_UART0_IRQ { IRQ_PBX_UART0 } |
164 | #define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } | 164 | #define PBX_UART1_IRQ { IRQ_PBX_UART1 } |
165 | #define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } | 165 | #define PBX_UART2_IRQ { IRQ_PBX_UART2 } |
166 | #define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } | 166 | #define PBX_UART3_IRQ { IRQ_PBX_UART3 } |
167 | #define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } | 167 | #define PBX_SSP_IRQ { IRQ_PBX_SSP } |
168 | 168 | ||
169 | /* FPGA Primecells */ | 169 | /* FPGA Primecells */ |
170 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 170 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); |