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authorBahadir Balban <bahadir.balban@arm.com>2008-12-01 09:54:55 -0500
committerCatalin Marinas <catalin.marinas@arm.com>2008-12-01 09:54:55 -0500
commite7c70825a758403cfb476903f3145e6a8c0dd3b5 (patch)
treea214331400abb2e2c86a32203d532dff930c4f1c /arch/arm/mach-realview
parent70bb62f8ecdda2d172b05d33b0e6750e3fe6d1c7 (diff)
RealView: Add support for the Cortex-A8 Platform Baseboard
This patch adds support for RealView/PB-A8, a platform based on Cortex-A8 with support for PCI-E and compact flash. Signed-off-by: Bahadir Balban <bahadir.balban@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/mach-realview')
-rw-r--r--arch/arm/mach-realview/Kconfig9
-rw-r--r--arch/arm/mach-realview/Makefile1
-rw-r--r--arch/arm/mach-realview/include/mach/board-pba8.h152
-rw-r--r--arch/arm/mach-realview/include/mach/debug-macro.S3
-rw-r--r--arch/arm/mach-realview/include/mach/irqs.h1
-rw-r--r--arch/arm/mach-realview/include/mach/uncompress.h3
-rw-r--r--arch/arm/mach-realview/realview_pba8.c307
7 files changed, 475 insertions, 1 deletions
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index 6695fb33afbf..8032f234c143 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -37,6 +37,15 @@ config MACH_REALVIEW_PB1176
37 help 37 help
38 Include support for the ARM(R) RealView ARM1176 Platform Baseboard. 38 Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
39 39
40config MACH_REALVIEW_PBA8
41 bool "Support RealView/PB-A8 platform"
42 select CPU_V7
43 select ARM_GIC
44 help
45 Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard.
46 PB-A8 is a platform with an on-board Cortex-A8 and has support for
47 PCI-E and Compact Flash.
48
40config REALVIEW_HIGH_PHYS_OFFSET 49config REALVIEW_HIGH_PHYS_OFFSET
41 bool "High physical base address for the RealView platform" 50 bool "High physical base address for the RealView platform"
42 depends on !MACH_REALVIEW_PB1176 51 depends on !MACH_REALVIEW_PB1176
diff --git a/arch/arm/mach-realview/Makefile b/arch/arm/mach-realview/Makefile
index d2ae077431dd..7bea8ffc4b59 100644
--- a/arch/arm/mach-realview/Makefile
+++ b/arch/arm/mach-realview/Makefile
@@ -6,5 +6,6 @@ obj-y := core.o clock.o
6obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o 6obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o
7obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o 7obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o
8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o 8obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o
9obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o
9obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o 10obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o
10obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 11obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff --git a/arch/arm/mach-realview/include/mach/board-pba8.h b/arch/arm/mach-realview/include/mach/board-pba8.h
new file mode 100644
index 000000000000..c8bed8f58bab
--- /dev/null
+++ b/arch/arm/mach-realview/include/mach/board-pba8.h
@@ -0,0 +1,152 @@
1/*
2 * include/asm-arm/arch-realview/board-pba8.h
3 *
4 * Copyright (C) 2008 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
19 */
20
21#ifndef __ASM_ARCH_BOARD_PBA8_H
22#define __ASM_ARCH_BOARD_PBA8_H
23
24#include <mach/platform.h>
25
26/*
27 * Peripheral addresses
28 */
29#define REALVIEW_PBA8_UART0_BASE 0x10009000 /* UART 0 */
30#define REALVIEW_PBA8_UART1_BASE 0x1000A000 /* UART 1 */
31#define REALVIEW_PBA8_UART2_BASE 0x1000B000 /* UART 2 */
32#define REALVIEW_PBA8_UART3_BASE 0x1000C000 /* UART 3 */
33#define REALVIEW_PBA8_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
34#define REALVIEW_PBA8_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
35#define REALVIEW_PBA8_WATCHDOG_BASE 0x10010000 /* watchdog interface */
36#define REALVIEW_PBA8_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
37#define REALVIEW_PBA8_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
38#define REALVIEW_PBA8_GPIO0_BASE 0x10013000 /* GPIO port 0 */
39#define REALVIEW_PBA8_RTC_BASE 0x10017000 /* Real Time Clock */
40#define REALVIEW_PBA8_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
41#define REALVIEW_PBA8_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
42#define REALVIEW_PBA8_SCTL_BASE 0x1001A000 /* System Controller */
43#define REALVIEW_PBA8_CLCD_BASE 0x10020000 /* CLCD */
44#define REALVIEW_PBA8_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
45#define REALVIEW_PBA8_DMC_BASE 0x100E0000 /* DMC configuration */
46#define REALVIEW_PBA8_SMC_BASE 0x100E1000 /* SMC configuration */
47#define REALVIEW_PBA8_CAN_BASE 0x100E2000 /* CAN bus */
48#define REALVIEW_PBA8_CF_BASE 0x18000000 /* Compact flash */
49#define REALVIEW_PBA8_CF_MEM_BASE 0x18003000 /* SMC for Compact flash */
50#define REALVIEW_PBA8_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
51#define REALVIEW_PBA8_FLASH0_BASE 0x40000000
52#define REALVIEW_PBA8_FLASH0_SIZE SZ_64M
53#define REALVIEW_PBA8_FLASH1_BASE 0x44000000
54#define REALVIEW_PBA8_FLASH1_SIZE SZ_64M
55#define REALVIEW_PBA8_ETH_BASE 0x4E000000 /* Ethernet */
56#define REALVIEW_PBA8_USB_BASE 0x4F000000 /* USB */
57#define REALVIEW_PBA8_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
58#define REALVIEW_PBA8_LT_BASE 0xC0000000 /* Logic Tile expansion */
59#define REALVIEW_PBA8_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
60#define REALVIEW_PBA8_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
61
62#define REALVIEW_PBA8_SYS_PLD_CTRL1 0x74
63
64/*
65 * PBA8 PCI regions
66 */
67#define REALVIEW_PBA8_PCI_BASE 0x90040000 /* PCI-X Unit base */
68#define REALVIEW_PBA8_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
69#define REALVIEW_PBA8_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
70
71#define REALVIEW_PBA8_PCI_BASE_SIZE 0x10000 /* 16 Kb */
72#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */
73#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */
74
75/*
76 * Irqs
77 */
78#define IRQ_PBA8_GIC_START 32
79
80/* L220
81#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
82#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
83#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
84*/
85
86/*
87 * PB-A8 on-board gic irq sources
88 */
89#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
90#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
91#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
92#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
93#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
94#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
95#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
96#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
97#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
98 /* 9 reserved */
99#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
100#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
101#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
102#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
103#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
104#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
105#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
106#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
107#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
108#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
109#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
110#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
111#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
112#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
113#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
114#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
115#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
116#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
117#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
118#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
119#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
120#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
121
122/* ... */
123#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
124#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
125#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
126#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
127
128#define IRQ_PBA8_SMC -1
129#define IRQ_PBA8_SCTL -1
130
131#define NR_GIC_PBA8 1
132
133/*
134 * Only define NR_IRQS if less than NR_IRQS_PBA8
135 */
136#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
137
138#if defined(CONFIG_MACH_REALVIEW_PBA8)
139
140#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
141#undef NR_IRQS
142#define NR_IRQS NR_IRQS_PBA8
143#endif
144
145#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
146#undef MAX_GIC_NR
147#define MAX_GIC_NR NR_GIC_PBA8
148#endif
149
150#endif /* CONFIG_MACH_REALVIEW_PBA8 */
151
152#endif /* __ASM_ARCH_BOARD_PBA8_H */
diff --git a/arch/arm/mach-realview/include/mach/debug-macro.S b/arch/arm/mach-realview/include/mach/debug-macro.S
index f072d88f1e96..92dbcb9e1792 100644
--- a/arch/arm/mach-realview/include/mach/debug-macro.S
+++ b/arch/arm/mach-realview/include/mach/debug-macro.S
@@ -11,7 +11,8 @@
11 */ 11 */
12 12
13#if defined(CONFIG_MACH_REALVIEW_EB) || \ 13#if defined(CONFIG_MACH_REALVIEW_EB) || \
14 defined(CONFIG_MACH_REALVIEW_PB11MP) 14 defined(CONFIG_MACH_REALVIEW_PB11MP) || \
15 defined(CONFIG_MACH_REALVIEW_PBA8)
15#ifndef DEBUG_LL_UART_OFFSET 16#ifndef DEBUG_LL_UART_OFFSET
16#define DEBUG_LL_UART_OFFSET 0x00009000 17#define DEBUG_LL_UART_OFFSET 0x00009000
17#elif DEBUG_LL_UART_OFFSET != 0x00009000 18#elif DEBUG_LL_UART_OFFSET != 0x00009000
diff --git a/arch/arm/mach-realview/include/mach/irqs.h b/arch/arm/mach-realview/include/mach/irqs.h
index 02a918529db3..fe5cb987aa21 100644
--- a/arch/arm/mach-realview/include/mach/irqs.h
+++ b/arch/arm/mach-realview/include/mach/irqs.h
@@ -25,6 +25,7 @@
25#include <mach/board-eb.h> 25#include <mach/board-eb.h>
26#include <mach/board-pb11mp.h> 26#include <mach/board-pb11mp.h>
27#include <mach/board-pb1176.h> 27#include <mach/board-pb1176.h>
28#include <mach/board-pba8.h>
28 29
29#define IRQ_LOCALTIMER 29 30#define IRQ_LOCALTIMER 29
30#define IRQ_LOCALWDOG 30 31#define IRQ_LOCALWDOG 30
diff --git a/arch/arm/mach-realview/include/mach/uncompress.h b/arch/arm/mach-realview/include/mach/uncompress.h
index 79f50f218e77..415d634d52ab 100644
--- a/arch/arm/mach-realview/include/mach/uncompress.h
+++ b/arch/arm/mach-realview/include/mach/uncompress.h
@@ -23,6 +23,7 @@
23#include <mach/board-eb.h> 23#include <mach/board-eb.h>
24#include <mach/board-pb11mp.h> 24#include <mach/board-pb11mp.h>
25#include <mach/board-pb1176.h> 25#include <mach/board-pb1176.h>
26#include <mach/board-pba8.h>
26 27
27#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) 28#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
28#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c)) 29#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
@@ -40,6 +41,8 @@ static inline unsigned long get_uart_base(void)
40 return REALVIEW_PB11MP_UART0_BASE; 41 return REALVIEW_PB11MP_UART0_BASE;
41 else if (machine_is_realview_pb1176()) 42 else if (machine_is_realview_pb1176())
42 return REALVIEW_PB1176_UART0_BASE; 43 return REALVIEW_PB1176_UART0_BASE;
44 else if (machine_is_realview_pba8())
45 return REALVIEW_PBA8_UART0_BASE;
43 else 46 else
44 return 0; 47 return 0;
45} 48}
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c
new file mode 100644
index 000000000000..0c237e90c995
--- /dev/null
+++ b/arch/arm/mach-realview/realview_pba8.c
@@ -0,0 +1,307 @@
1/*
2 * linux/arch/arm/mach-realview/realview_pba8.c
3 *
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/sysdev.h>
25#include <linux/amba/bus.h>
26#include <linux/io.h>
27
28#include <asm/irq.h>
29#include <asm/leds.h>
30#include <asm/mach-types.h>
31#include <asm/hardware/gic.h>
32#include <asm/hardware/icst307.h>
33
34#include <asm/mach/arch.h>
35#include <asm/mach/map.h>
36#include <asm/mach/mmc.h>
37#include <asm/mach/time.h>
38
39#include <mach/hardware.h>
40#include <mach/board-pba8.h>
41#include <mach/irqs.h>
42
43#include "core.h"
44#include "clock.h"
45
46static struct map_desc realview_pba8_io_desc[] __initdata = {
47 {
48 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
49 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
50 .length = SZ_4K,
51 .type = MT_DEVICE,
52 }, {
53 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_CPU_BASE),
54 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_CPU_BASE),
55 .length = SZ_4K,
56 .type = MT_DEVICE,
57 }, {
58 .virtual = IO_ADDRESS(REALVIEW_PBA8_GIC_DIST_BASE),
59 .pfn = __phys_to_pfn(REALVIEW_PBA8_GIC_DIST_BASE),
60 .length = SZ_4K,
61 .type = MT_DEVICE,
62 }, {
63 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
64 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
65 .length = SZ_4K,
66 .type = MT_DEVICE,
67 }, {
68 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER0_1_BASE),
69 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER0_1_BASE),
70 .length = SZ_4K,
71 .type = MT_DEVICE,
72 }, {
73 .virtual = IO_ADDRESS(REALVIEW_PBA8_TIMER2_3_BASE),
74 .pfn = __phys_to_pfn(REALVIEW_PBA8_TIMER2_3_BASE),
75 .length = SZ_4K,
76 .type = MT_DEVICE,
77 },
78#ifdef CONFIG_PCI
79 {
80 .virtual = PCIX_UNIT_BASE,
81 .pfn = __phys_to_pfn(REALVIEW_PBA8_PCI_BASE),
82 .length = REALVIEW_PBA8_PCI_BASE_SIZE,
83 .type = MT_DEVICE
84 },
85#endif
86#ifdef CONFIG_DEBUG_LL
87 {
88 .virtual = IO_ADDRESS(REALVIEW_PBA8_UART0_BASE),
89 .pfn = __phys_to_pfn(REALVIEW_PBA8_UART0_BASE),
90 .length = SZ_4K,
91 .type = MT_DEVICE,
92 },
93#endif
94};
95
96static void __init realview_pba8_map_io(void)
97{
98 iotable_init(realview_pba8_io_desc, ARRAY_SIZE(realview_pba8_io_desc));
99}
100
101/*
102 * RealView PBA8Core AMBA devices
103 */
104
105#define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ }
106#define GPIO2_DMA { 0, 0 }
107#define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ }
108#define GPIO3_DMA { 0, 0 }
109#define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ }
110#define AACI_DMA { 0x80, 0x81 }
111#define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B }
112#define MMCI0_DMA { 0x84, 0 }
113#define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ }
114#define KMI0_DMA { 0, 0 }
115#define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ }
116#define KMI1_DMA { 0, 0 }
117#define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ }
118#define PBA8_SMC_DMA { 0, 0 }
119#define MPMC_IRQ { NO_IRQ, NO_IRQ }
120#define MPMC_DMA { 0, 0 }
121#define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ }
122#define PBA8_CLCD_DMA { 0, 0 }
123#define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ }
124#define DMAC_DMA { 0, 0 }
125#define SCTL_IRQ { NO_IRQ, NO_IRQ }
126#define SCTL_DMA { 0, 0 }
127#define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ }
128#define PBA8_WATCHDOG_DMA { 0, 0 }
129#define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ }
130#define PBA8_GPIO0_DMA { 0, 0 }
131#define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ }
132#define GPIO1_DMA { 0, 0 }
133#define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ }
134#define PBA8_RTC_DMA { 0, 0 }
135#define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ }
136#define SCI_DMA { 7, 6 }
137#define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ }
138#define PBA8_UART0_DMA { 15, 14 }
139#define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ }
140#define PBA8_UART1_DMA { 13, 12 }
141#define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ }
142#define PBA8_UART2_DMA { 11, 10 }
143#define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ }
144#define PBA8_UART3_DMA { 0x86, 0x87 }
145#define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ }
146#define PBA8_SSP_DMA { 9, 8 }
147
148/* FPGA Primecells */
149AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
150AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
151AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
152AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
153AMBA_DEVICE(uart3, "fpga:09", PBA8_UART3, NULL);
154
155/* DevChip Primecells */
156AMBA_DEVICE(smc, "dev:00", PBA8_SMC, NULL);
157AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
158AMBA_DEVICE(wdog, "dev:e1", PBA8_WATCHDOG, NULL);
159AMBA_DEVICE(gpio0, "dev:e4", PBA8_GPIO0, NULL);
160AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
161AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
162AMBA_DEVICE(rtc, "dev:e8", PBA8_RTC, NULL);
163AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
164AMBA_DEVICE(uart0, "dev:f1", PBA8_UART0, NULL);
165AMBA_DEVICE(uart1, "dev:f2", PBA8_UART1, NULL);
166AMBA_DEVICE(uart2, "dev:f3", PBA8_UART2, NULL);
167AMBA_DEVICE(ssp0, "dev:f4", PBA8_SSP, NULL);
168
169/* Primecells on the NEC ISSP chip */
170AMBA_DEVICE(clcd, "issp:20", PBA8_CLCD, &clcd_plat_data);
171AMBA_DEVICE(dmac, "issp:30", DMAC, NULL);
172
173static struct amba_device *amba_devs[] __initdata = {
174 &dmac_device,
175 &uart0_device,
176 &uart1_device,
177 &uart2_device,
178 &uart3_device,
179 &smc_device,
180 &clcd_device,
181 &sctl_device,
182 &wdog_device,
183 &gpio0_device,
184 &gpio1_device,
185 &gpio2_device,
186 &rtc_device,
187 &sci0_device,
188 &ssp0_device,
189 &aaci_device,
190 &mmc0_device,
191 &kmi0_device,
192 &kmi1_device,
193};
194
195/*
196 * RealView PB-A8 platform devices
197 */
198static struct resource realview_pba8_flash_resource[] = {
199 [0] = {
200 .start = REALVIEW_PBA8_FLASH0_BASE,
201 .end = REALVIEW_PBA8_FLASH0_BASE + REALVIEW_PBA8_FLASH0_SIZE - 1,
202 .flags = IORESOURCE_MEM,
203 },
204 [1] = {
205 .start = REALVIEW_PBA8_FLASH1_BASE,
206 .end = REALVIEW_PBA8_FLASH1_BASE + REALVIEW_PBA8_FLASH1_SIZE - 1,
207 .flags = IORESOURCE_MEM,
208 },
209};
210
211static struct resource realview_pba8_smsc911x_resources[] = {
212 [0] = {
213 .start = REALVIEW_PBA8_ETH_BASE,
214 .end = REALVIEW_PBA8_ETH_BASE + SZ_64K - 1,
215 .flags = IORESOURCE_MEM,
216 },
217 [1] = {
218 .start = IRQ_PBA8_ETH,
219 .end = IRQ_PBA8_ETH,
220 .flags = IORESOURCE_IRQ,
221 },
222};
223
224static struct platform_device realview_pba8_smsc911x_device = {
225 .name = "smc911x",
226 .id = 0,
227 .num_resources = ARRAY_SIZE(realview_pba8_smsc911x_resources),
228 .resource = realview_pba8_smsc911x_resources,
229};
230
231struct resource realview_pba8_cf_resources[] = {
232 [0] = {
233 .start = REALVIEW_PBA8_CF_BASE,
234 .end = REALVIEW_PBA8_CF_BASE + SZ_4K - 1,
235 .flags = IORESOURCE_MEM,
236 },
237 [1] = {
238 .start = REALVIEW_PBA8_CF_MEM_BASE,
239 .end = REALVIEW_PBA8_CF_MEM_BASE + SZ_4K - 1,
240 .flags = IORESOURCE_MEM,
241 },
242 [2] = {
243 .start = -1, /* FIXME: Find correct irq */
244 .end = -1,
245 .flags = IORESOURCE_IRQ,
246 },
247};
248
249struct platform_device realview_pba8_cf_device = {
250 .name = "compactflash",
251 .id = 0,
252 .num_resources = ARRAY_SIZE(realview_pba8_cf_resources),
253 .resource = realview_pba8_cf_resources,
254};
255
256static void __init gic_init_irq(void)
257{
258 /* ARM PB-A8 on-board GIC */
259 gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
260 gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START);
261 gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
262}
263
264static void __init realview_pba8_timer_init(void)
265{
266 timer0_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE);
267 timer1_va_base = __io_address(REALVIEW_PBA8_TIMER0_1_BASE) + 0x20;
268 timer2_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE);
269 timer3_va_base = __io_address(REALVIEW_PBA8_TIMER2_3_BASE) + 0x20;
270
271 realview_timer_init(IRQ_PBA8_TIMER0_1);
272}
273
274static struct sys_timer realview_pba8_timer = {
275 .init = realview_pba8_timer_init,
276};
277
278static void __init realview_pba8_init(void)
279{
280 int i;
281
282 realview_flash_register(realview_pba8_flash_resource,
283 ARRAY_SIZE(realview_pba8_flash_resource));
284 platform_device_register(&realview_pba8_smsc911x_device);
285 platform_device_register(&realview_i2c_device);
286 platform_device_register(&realview_pba8_cf_device);
287
288 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
289 struct amba_device *d = amba_devs[i];
290 amba_device_register(d, &iomem_resource);
291 }
292
293#ifdef CONFIG_LEDS
294 leds_event = realview_leds_event;
295#endif
296}
297
298MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
299 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
300 .phys_io = REALVIEW_PBA8_UART0_BASE,
301 .io_pg_offst = (IO_ADDRESS(REALVIEW_PBA8_UART0_BASE) >> 18) & 0xfffc,
302 .boot_params = PHYS_OFFSET + 0x00000100,
303 .map_io = realview_pba8_map_io,
304 .init_irq = gic_init_irq,
305 .timer = &realview_pba8_timer,
306 .init_machine = realview_pba8_init,
307MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 20:29:34 -0500