diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-04 10:55:14 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-14 14:21:30 -0500 |
commit | b580b899dd05a007ad232ee49a07b32d91876462 (patch) | |
tree | 72def6f195ca02a5f9eb5e082930603b85349b0e /arch/arm/mach-realview/realview_eb.c | |
parent | e745a6676c76280f9721adeec79b08a0f2dfcc21 (diff) |
ARM: GIC: provide a single initialization function for boot CPU
Provide gic_init() which initializes the GIC distributor and current
CPU's GIC interface for the boot (or single) CPU.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-realview/realview_eb.c')
-rw-r--r-- | arch/arm/mach-realview/realview_eb.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index f2697106f809..241bcbc73f61 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
@@ -365,20 +365,20 @@ static void __init gic_init_irq(void) | |||
365 | 365 | ||
366 | /* core tile GIC, primary */ | 366 | /* core tile GIC, primary */ |
367 | gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE); | 367 | gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE); |
368 | gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29); | 368 | gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), |
369 | gic_cpu_init(0, gic_cpu_base_addr); | 369 | gic_cpu_base_addr); |
370 | 370 | ||
371 | #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB | 371 | #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB |
372 | /* board GIC, secondary */ | 372 | /* board GIC, secondary */ |
373 | gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64); | 373 | gic_init(1, 64, __io_address(REALVIEW_EB_GIC_DIST_BASE), |
374 | gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE)); | 374 | __io_address(REALVIEW_EB_GIC_CPU_BASE)); |
375 | gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1); | 375 | gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1); |
376 | #endif | 376 | #endif |
377 | } else { | 377 | } else { |
378 | /* board GIC, primary */ | 378 | /* board GIC, primary */ |
379 | gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE); | 379 | gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE); |
380 | gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29); | 380 | gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE), |
381 | gic_cpu_init(0, gic_cpu_base_addr); | 381 | gic_cpu_base_addr); |
382 | } | 382 | } |
383 | } | 383 | } |
384 | 384 | ||