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authorCatalin Marinas <catalin.marinas@arm.com>2008-12-01 09:54:58 -0500
committerCatalin Marinas <catalin.marinas@arm.com>2008-12-01 09:54:58 -0500
commit1bbdf637baa708a2f0f46ead56c6c618b7dad7a8 (patch)
treef80c52af7e6fcc9ee86c82a184bdd34a7c335679 /arch/arm/mach-realview/platsmp.c
parentebac6546df7e8bd17f66f029c616ea9ee3c595ae (diff)
RealView: Clean up the machine_is_*() calls in platsmp.c
Some of the calls weren't necessary and some others were duplicated. This patch tidies up the platsmp.c file. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/mach-realview/platsmp.c')
-rw-r--r--arch/arm/mach-realview/platsmp.c41
1 files changed, 16 insertions, 25 deletions
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index faeb01c76f66..8fce85f33033 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -23,6 +23,8 @@
23#include <mach/board-pb11mp.h> 23#include <mach/board-pb11mp.h>
24#include <mach/scu.h> 24#include <mach/scu.h>
25 25
26#include "core.h"
27
26extern void realview_secondary_startup(void); 28extern void realview_secondary_startup(void);
27 29
28/* 30/*
@@ -31,16 +33,20 @@ extern void realview_secondary_startup(void);
31 */ 33 */
32volatile int __cpuinitdata pen_release = -1; 34volatile int __cpuinitdata pen_release = -1;
33 35
36static void __iomem *scu_base_addr(void)
37{
38 if (machine_is_realview_eb_mp())
39 return __io_address(REALVIEW_EB11MP_SCU_BASE);
40 else if (machine_is_realview_pb11mp())
41 return __io_address(REALVIEW_TC11MP_SCU_BASE);
42 else
43 return (void __iomem *)0;
44}
45
34static unsigned int __init get_core_count(void) 46static unsigned int __init get_core_count(void)
35{ 47{
36 unsigned int ncores; 48 unsigned int ncores;
37 void __iomem *scu_base = 0; 49 void __iomem *scu_base = scu_base_addr();
38
39 if (machine_is_realview_eb() &&
40 (core_tile_eb11mp() || core_tile_a9mp()))
41 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
42 else if (machine_is_realview_pb11mp())
43 scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
44 50
45 if (scu_base) { 51 if (scu_base) {
46 ncores = __raw_readl(scu_base + SCU_CONFIG); 52 ncores = __raw_readl(scu_base + SCU_CONFIG);
@@ -57,15 +63,7 @@ static unsigned int __init get_core_count(void)
57static void scu_enable(void) 63static void scu_enable(void)
58{ 64{
59 u32 scu_ctrl; 65 u32 scu_ctrl;
60 void __iomem *scu_base; 66 void __iomem *scu_base = scu_base_addr();
61
62 if (machine_is_realview_eb() &&
63 (core_tile_eb11mp() || core_tile_a9mp()))
64 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
65 else if (machine_is_realview_pb11mp())
66 scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
67 else
68 BUG();
69 67
70 scu_ctrl = __raw_readl(scu_base + SCU_CTRL); 68 scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
71 scu_ctrl |= 1; 69 scu_ctrl |= 1;
@@ -90,11 +88,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
90 * core (e.g. timer irq), then they will not have been enabled 88 * core (e.g. timer irq), then they will not have been enabled
91 * for us: do so 89 * for us: do so
92 */ 90 */
93 if (machine_is_realview_eb() && 91 gic_cpu_init(0, gic_cpu_base_addr);
94 (core_tile_eb11mp() || core_tile_a9mp()))
95 gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
96 else if (machine_is_realview_pb11mp())
97 gic_cpu_init(0, __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
98 92
99 /* 93 /*
100 * let the primary processor know we're out of the 94 * let the primary processor know we're out of the
@@ -235,10 +229,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
235 * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in 229 * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
236 * realview_timer_init 230 * realview_timer_init
237 */ 231 */
238 if ((machine_is_realview_eb() && 232 local_timer_setup();
239 (core_tile_eb11mp() || core_tile_a9mp())) ||
240 machine_is_realview_pb11mp())
241 local_timer_setup();
242#endif 233#endif
243 234
244 /* 235 /*